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git01.mediatek.com / filogic / uboot / f580a300fa521c03828153ab9bc056012e967c2d / arch / arm / dts / zynqmp-clk-ccf.dtsi
  1. 510edb8 arm64: zynqmp: Remove unused dp_aclk clock by Michal Simek · Tue Jun 01 16:40:43 2021 +0200
  2. 958c0e9 xilinx: Sync DTs with Linux kernel by Michal Simek · Thu Nov 26 14:25:02 2020 +0100
  3. 3767425 arm64: zynqmp: Sync DP subsystem by Michal Simek · Tue Feb 18 09:24:08 2020 +0100
  4. 042ae5e arm64: zynqmp: Sync zynqmp fpga manager with mainline by Nava kishore Manne · Fri Oct 18 18:07:32 2019 +0200
  5. 4f1b7f6 arm64: zynqmp: Update Copyright years to 2020 by Michal Simek · Tue Feb 18 08:38:06 2020 +0100
  6. 1092d68 arm64: zynqmp: Sync gem clock nodes with mainline Linux by Michal Simek · Thu Jan 09 14:15:07 2020 +0100
  7. 7b6280e arm64: zynqmp: List lpd watchdog in dtsi by Michal Simek · Wed Jul 18 09:25:43 2018 +0200
  8. ebddf49 arm64: zynqmp: Switch to xlnx-zynqmp-clk header by Michal Simek · Mon Oct 14 15:42:03 2019 +0200
  9. 36d68be arm64: zynqmp: Add TTC clocks by Rajan Vaja · Wed Apr 25 05:34:04 2018 -0700
  10. 090a2d7 arm64: zynqmp: Sync up license with mainline kernel by Michal Simek · Tue Mar 27 10:36:39 2018 +0200
  11. a6604b6 arm64: zynqmp: Convert board to use zynqmp-clk driver by Michal Simek · Fri Dec 08 14:50:42 2017 +0100