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git01.mediatek.com / filogic / uboot / f3ce30c400ded31b8ec55c4cdf7f6eac9615c6ce / board / denx / mcvevk / qts / pll_config.h
  1. a4efe76 arm: socfpga: mcvevk: Update DRAM clock to 400MHz by Marek Vasut · Tue Sep 08 19:51:05 2015 +0200
  2. 8e8b62a arm: socfpga: Add support for DENX MCV SoM and MCVEVK board by Marek Vasut · Mon Aug 03 01:37:28 2015 +0200