Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / f2d87ffcf112ccbc483727d7d65c0326894f8949 / drivers / clk / renesas / clk-rcar-gen2.c
  1. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  2. ab11876 clk: renesas: Switch to fdtdec_get_addr_size_auto_noparent() on Gen2 by Marek Vasut · Sat Mar 21 16:45:29 2020 +0100
  3. 0f6aa07 clk: renesas: Add support for setting MMCIF clock divider on Gen2 by Marek Vasut · Mon Mar 18 06:04:02 2019 +0100
  4. 31872db clk: renesas: Fix swapped div and mul in debug output on Gen2 by Marek Vasut · Mon Mar 18 05:38:08 2019 +0100
  5. 272daa7 clk: renesas: Fix SDH clock divider decoding on Gen2 by Marek Vasut · Mon Mar 18 05:11:42 2019 +0100
  6. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  7. f63b295 clk: renesas: Add Gen2 clock core by Marek Vasut · Mon Jan 08 16:38:51 2018 +0100