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git01.mediatek.com / filogic / uboot / f1c51912923fa9cfe4af990f427bfce9ebc37eed / drivers / crypto / fsl / jr.h
  1. 3c3e9a1 crypto: fsl: refactor for 32 bit version CAAM support on ARM64 by Ye Li · Thu Mar 25 17:30:36 2021 +0800
  2. 6c372bd crypto: caam: Fix pointer size to 32bit for i.MX8M by Aymen Sghaier · Thu Mar 25 17:30:28 2021 +0800
  3. 7181278 crypto: caam: change JR running loop by Franck LENORMAND · Thu Mar 25 17:30:22 2021 +0800
  4. 01d536d Revert "drivers/crypto/fsl: assign job-rings to non-TrustZone" by Breno Matheus Lima · Tue Jun 04 02:54:44 2019 +0000
  5. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  6. aed8eac crypto/fsl: instantiate all rng state handles by Lukas Auer · Thu Jan 25 14:11:17 2018 +0100
  7. 542c1e0 drivers/crypto/fsl: assign job-rings to non-TrustZone by Bryan O'Donoghue · Fri Jan 26 16:27:14 2018 +0000
  8. 7703d1e crypto/fsl: add support for multiple SEC engines initialization by Alex Porosanu · Fri Apr 29 15:18:00 2016 +0300
  9. 0c19cea crypto/fsl: Make CAAM transactions cacheable by Saksham Jain · Wed Mar 23 16:24:42 2016 +0530
  10. d218033 drivers/crypto/fsl : Allocate output ring with size aligned to CACHELNE SIZE by Ruchika Gupta · Fri Jan 22 16:12:55 2016 +0530
  11. 4342182 crypto/fsl: SEC driver cleanup for 64 bit and endianness by Aneesh Bansal · Thu Oct 29 22:58:03 2015 +0530
  12. 66e26aa drivers/crypto/fsl: fix snooping for write transactions by horia.geanta@freescale.com · Wed Jul 08 17:24:57 2015 +0300
  13. ac1b269 fsl_sec: Add hardware accelerated SHA256 and SHA1 by Ruchika Gupta · Wed Oct 15 11:35:30 2014 +0530