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git01.mediatek.com / filogic / uboot / f0b06313921d42184f12ae9dd5ea09a14d3b2df4 / drivers / clk / sunxi / clk_v3s.c
  1. bc12313 clk: sunxi: Implement SPI clocks, resets by Jagan Teki · Wed Feb 27 20:02:06 2019 +0530
  2. ddf33c1 sunxi: clk: add MMC gates/resets by Andre Przywara · Tue Jan 29 15:54:09 2019 +0000
  3. b490aa5 clk: sunxi: Implement UART resets by Jagan Teki · Sun Dec 30 21:37:31 2018 +0530
  4. 8cf08ea clk: sunxi: Implement UART clocks by Jagan Teki · Sun Dec 30 21:29:24 2018 +0530
  5. d69bf0b clk: sunxi: Add Allwinner V3S CLK driver by Jagan Teki · Sun Aug 05 14:31:54 2018 +0530