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git01.mediatek.com / filogic / uboot / f0626599c47c530358b89046d7158fbb14ed324a / board / stx / stxgp3 / ddr.c
  1. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · 11 years ago
  2. 4a71741 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · 11 years ago
  3. c68e86c powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board by Kumar Gala · 14 years ago
  4. b78c7bf powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq() by Kumar Gala · 14 years ago
  5. dd67ddc stx: create common vendor/board hierarchy for STx boards by Alex Dubov · 15 years ago[Renamed from board/stxgp3/ddr.c]
  6. a06d74c fsl-ddr: use the 1T timing as default configuration by Dave Liu · 16 years ago
  7. fa44036 Pass dimm parameters to populate populate controller options by Haiying Wang · 16 years ago
  8. 5b4ae73 FSL DDR: Convert STXGP3 to new DDR code. by Kumar Gala · 16 years ago