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git01.mediatek.com / filogic / uboot / efe041956a5e8d0f09d1c973828bab9ca3b1a3f1 / arch / arm / mach-tegra / tegra114 / clock.c
  1. 0fca329 ARM: tegra114: Clear IDDQ when enabling PLLC by Thierry Reding · 9 years ago
  2. 4c3aaa7 ARM: tegra: clk_m is the architected timer source clock by Thierry Reding · 9 years ago
  3. 366b24f of: clean up OF_CONTROL ifdef conditionals by Masahiro Yamada · 9 years ago
  4. a8480ef Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. by Tom Warren · 9 years ago
  5. ed1632a ARM: tegra: collect SoC sources into mach-tegra by Masahiro Yamada · 10 years ago[Renamed from arch/arm/cpu/tegra114-common/clock.c]
  6. 2a544db ARM: tegra: don't exceed AVP limits when configuring PLLP by Jimmy Zhang · 11 years ago
  7. 510c0ae ARM: tegra: rename MASK_BITS_29_28 to MASK_BITS_31_28 by Stephen Warren · 11 years ago
  8. ea21e76 ARM: tegra: deduplicate MASK_BITS_xxx clock mux enum by Tom Warren · 11 years ago
  9. fbef355 Tegra114: Initialize System Counter (TSC) with osc frequency by Tom Warren · 12 years ago
  10. e3d95bc Tegra114: Add common CPU (shared) files by Tom Warren · 12 years ago