Log - ee93f79e6a08017ee2abf761db5a77e0cb6c8a7d - filogic/uboot

4ae7a95 riscv: cpu: check and append L1 cache to cpu features by Sagar Shrikant Kadam · Sun Jun 28 07:45:03 2020 -0700
afc0c19 riscv: cpu: correctly handle the setting of CPU_FEAT_MMU bit by Sagar Shrikant Kadam · Sun Jun 28 07:45:02 2020 -0700
d2a10ff riscv: Enable cpu clock if it is present by Sean Anderson · Wed Jun 24 06:41:22 2020 -0400
4724409 riscv: Try to get cpu frequency from a "clocks" node if it exists by Sean Anderson · Wed Jun 24 06:41:21 2020 -0400
4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
33d46a2 riscv: cpu: Skip unavailable hart in the get_count() op by Bin Meng · Thu Aug 08 00:52:08 2019 -0700
04098f9 cpu: Bind timer driver for boot hart by Atish Patra · Mon Feb 25 08:15:14 2019 +0000
c4fcb62 cpu: Add a RISC-V CPU driver by Bin Meng · Wed Dec 12 06:12:26 2018 -0800