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git01.mediatek.com / filogic / uboot / ee2e54f283ba830b89d22e3c3a1c4684fbe9bcde / drivers / ddr / fsl / mpc86xx_ddr.c
  1. a21803d Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx by York Sun · Mon Nov 18 10:29:32 2013 -0800
  2. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · Mon Sep 30 09:22:09 2013 -0700[Renamed (94%) from arch/powerpc/cpu/mpc86xx/ddr-8641.c]
  3. 5e15555 powerpc/mpc8xxx: Add memory reset control by York Sun · Tue Jun 25 11:37:48 2013 -0700
  4. 992562c 8xxx: Change all 8*xx_DDR addresses to 8xxx by Andy Fleming · Tue Oct 23 19:03:46 2012 -0500
  5. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · Thu Apr 15 16:07:28 2010 +0200[Renamed from arch/ppc/cpu/mpc86xx/ddr-8641.c]
  6. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · Mon Apr 12 22:28:09 2010 -0500[Renamed from cpu/mpc86xx/ddr-8641.c]
  7. af5829cb 86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fields by Peter Tyser · Fri Jul 17 10:14:45 2009 -0500
  8. 0383694 rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · Thu Oct 16 15:01:15 2008 +0200
  9. 72c625b FSL DDR: Remove duplicate setting of cs0_bnds register on 86xx. by Kumar Gala · Wed Aug 27 01:10:34 2008 -0500
  10. 2e6ba7d FSL DDR: Add 86xx specific register setting by Kumar Gala · Tue Aug 26 15:01:34 2008 -0500