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git01.mediatek.com / filogic / uboot / ed32c0c9fd0f712adc95abf76d00f6b249e42c9f / drivers / spi / designware_spi.c
  1. fac4491 spi: designware_spi: Use GENMASK by Jagan Teki · Fri Oct 23 01:01:36 2015 +0530
  2. b17746d spi: designware_spi: Use BIT macro by Jagan Teki · Fri Oct 23 01:36:23 2015 +0530
  3. 0971778 dm: Use dev_get_addr() where possible by Simon Glass · Tue Aug 11 08:33:29 2015 -0600
  4. 83cfd37 spi: designware_spi: revisit FIFO size detection again by Axel Lin · Thu Feb 26 10:45:22 2015 +0800
  5. 31a4d8d dm: spi: Move the per-child data size to the uclass by Simon Glass · Sun Jan 25 08:27:07 2015 -0700
  6. 67e767d dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi by Marek Vasut · Wed Dec 31 20:14:55 2014 +0100
  7. 3895c02 spi: designware_spi: Fix detecting FIFO depth by Axel Lin · Tue Jan 06 08:08:25 2015 +0800
  8. 571e2a4 spi: designware_spi: Some fixes / changes by Stefan Roese · Sun Nov 16 12:47:01 2014 +0100
  9. d987ea6 spi: Add designware master SPI DM driver used on SoCFPGA by Stefan Roese · Fri Nov 07 13:50:31 2014 +0100