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git01.mediatek.com
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filogic
/
uboot
/
ea19a8d49c230a5799443e4e7c17c29ad3831335
/
arch
/
arm
/
mach-socfpga
/
board.c
9758973
common: Drop init.h from common header
by Simon Glass
· Sun May 10 11:40:02 2020 -0600
8fdb419
ARM: socfpga: Reorder Arria10 SPL
by Marek Vasut
· Sat Aug 18 19:11:52 2018 +0200
911a665
ARM: socfpga: Assure correct CPACR configuration
by Marek Vasut
· Thu Jul 12 15:07:46 2018 +0200
27f05ac
arm: socfpga: Fix: Compile MCR instruction on ARM 32-bit only
by Ley Foon Tan
· Thu Jul 12 19:13:34 2018 +0800
72cc958
ARM: socfpga: Assure correct ACTLR configuration
by Marek Vasut
· Tue May 29 16:16:46 2018 +0200
f3f525c
ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot
by Tien Fong Chee
· Tue Dec 05 15:58:08 2017 +0800
a5bfce3
ARM: socfpga: Adding clock frequency info for U-Boot
by Tien Fong Chee
· Tue Dec 05 15:58:07 2017 +0800
3710de7
ARM: socfpga: Add DRAM bank size initialization function
by Tien Fong Chee
· Tue Dec 05 15:58:01 2017 +0800
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
05204f6
arm: socfpga: Introduce common board code
by Marek Vasut
· Sat Dec 05 21:07:23 2015 +0100