1. 172081c armv8/ls1043a: Implement workaround for erratum A009660 by Mingkai Hu · Tue Feb 02 11:28:03 2016 +0800
  2. 3ed72eb armv8/ls1043a: enable workaround for errarum A009942 by Shengzhou Liu · Fri Jan 29 16:56:01 2016 +0800
  3. b01bbb7 arm8: ls2080: Move the core errata defines out of board specific file by Ashish kumar · Fri Jan 29 16:40:08 2016 +0530
  4. 9c6d33c armv8: ls2080a: Implement workaround for core errata 829520, 833471 by Ashish kumar · Wed Jan 27 18:09:32 2016 +0530
  5. bdda96c driver/ddr/fsl: Add workaround for A009663 by Shengzhou Liu · Wed Dec 16 16:45:41 2015 +0800
  6. fa2e2fb fsl/ddr: Add workaround for ERRATUM_A009942 by Shengzhou Liu · Wed Jan 06 11:26:51 2016 +0800
  7. 8beb075 armv8/ls1043a: Implement workaround for PEX erratum A009929 by Mingkai Hu · Mon Dec 07 16:58:54 2015 +0800
  8. b3e9820 armv8/ls1043ardb: add SECURE BOOT target for NOR by Aneesh Bansal · Tue Dec 08 13:54:29 2015 +0530
  9. 0804d56 armv8: fsl-layerscape: Make DDR non secure in MMU tables by York Sun · Fri Dec 04 11:57:08 2015 -0800
  10. f6c8395 armv8/ls1043ardb: Add support for >2GB memory by Shaohui Xie · Mon Nov 23 15:23:48 2015 +0800
  11. 22cfe96 armv8: ls2085a: Add workaround of errata A009635 by Prabhakar Kushwaha · Thu Nov 05 12:00:14 2015 +0530
  12. d957a67 drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3 by York Sun · Wed Nov 04 09:53:10 2015 -0800
  13. 1921899 pci/layerscape: add support for LS1043A PCIe LUT register access by Mingkai Hu · Wed Nov 11 17:58:34 2015 +0800
  14. 77f7ded armv8: ls2085a: Add support of LS2085A SoC by Prabhakar Kushwaha · Mon Nov 09 16:42:20 2015 +0530
  15. 122bcfd armv8: LS2080A: Rename LS2085A to reflect LS2080A by Prabhakar Kushwaha · Mon Nov 09 16:42:07 2015 +0530
  16. e4e93ea armv8/fsl_lsch2: Add fsl_lsch2 SoC by Mingkai Hu · Mon Oct 26 19:47:51 2015 +0800
  17. 0e58b51 armv8/fsl_lsch3: Change arch to fsl-layerscape by Mingkai Hu · Mon Oct 26 19:47:50 2015 +0800