1. e869d79 MIPS: move create_tlb() in an proper header: mipsregs.h by Gregory CLEMENT · 6 years ago
  2. 59218bb MIPS: remove local_irq_[save|restore] from CP0 macros by Daniel Schwierzeck · 6 years ago
  3. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  4. ecf0d79 MIPS: fix iand optimize setup of CP0 registers by Daniel Schwierzeck · 9 years ago
  5. fcdc1fb MIPS: Hang if run on a secondary CPU by Paul Burton · 8 years ago
  6. 8156078 MIPS: L2 cache support by Paul Burton · 8 years ago
  7. 4f5561c MIPS: Preserve Config implementation-defined bits by Paul Burton · 8 years ago
  8. a6dae71 MIPS: sync processor and register definitions with linux-4.4 by Daniel Schwierzeck · 9 years ago
  9. 36c624a mips: Use unsigned int when reading c0 registers by Chris Packham · 9 years ago
  10. f122b5a mips32: detect L1 cache sizes if they're not defined by Paul Burton · 11 years ago
  11. 3cba3c1 Move architecture-specific includes to arch/$ARCH/include/asm by Peter Tyser · 15 years ago[Renamed from include/asm-mips/mipsregs.h]
  12. 0fdd27e [MIPS] <asm/mipsregs.h>: Update coprocessor register access macros by Shinya Kuribayashi · 17 years ago
  13. 179f974 [MIPS] <asm/mipsregs.h>: Update register / bit field definitions by Shinya Kuribayashi · 17 years ago
  14. 43ce5b7 [MIPS] <asm/mipsregs.h>: CodinygStyle cleanups by Shinya Kuribayashi · 17 years ago
  15. a1be476 Big white-space cleanup. by Wolfgang Denk · 17 years ago
  16. 9b7f384 * Patch by Steven Scholz, 10 Oct 2003 - Add support for Altera FPGA ACEX1K by wdenk · 21 years ago
  17. 57b2d80 * Code cleanup: by wdenk · 21 years ago
  18. 4fc9569 * Add support for 16 MB flash configuration of TRAB board by wdenk · 22 years ago