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git01.mediatek.com / filogic / uboot / e7997ef57478cae1fbe95c11e2231ff195c4ac08 / drivers / fpga / socfpga_arria10.c
  1. 0e13e5f fpga: arria10: Fix error in fpga pin configuration by Dalon Westergreen · Tue Jul 16 09:28:10 2019 -0700
  2. fe03d80 spl: socfpga: Implement fpga bitstream loading with socfpga loadfs by Tien Fong Chee · Tue May 07 17:42:30 2019 +0800
  3. ca99a8a ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading by Tien Fong Chee · Tue May 07 17:42:28 2019 +0800
  4. 725b122 ARM: socfpga: Moving the watchdog reset to the for-loop status polling by Tien Fong Chee · Tue May 07 17:42:27 2019 +0800
  5. 7f3dace ARM: socfpga: Cleaning up and ensuring consistent format messages in driver by Tien Fong Chee · Tue May 07 17:42:26 2019 +0800
  6. 4003448 arm: socfpga: fpga: fix type of local variable by Simon Goldschmidt · Mon Oct 15 20:35:10 2018 +0200
  7. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  8. bdfb5c4 Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR by Tom Rini · Wed Apr 18 13:50:47 2018 -0400
  9. 2c0f3ae arm: socfpga: Fix with the correct polling on bit is set by Tien Fong Chee · Tue Dec 05 15:57:58 2017 +0800
  10. 918de03 wait_bit: use wait_for_bit_le32 and remove wait_for_bit by Álvaro Fernández Rojas · Tue Jan 23 17:14:55 2018 +0100
  11. 1d675f3 arm: socfpga: Add FPGA driver support for Arria 10 by Tien Fong Chee · Wed Jul 26 13:05:43 2017 +0800