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git01.mediatek.com / filogic / uboot / e74c654d1b7e9b1daae30b25357d508e2274c1d4 / drivers / clk / aspeed
  1. dd8c084 clk/ast2500: Add SD clock by Joel Stanley · Thu Jun 23 18:35:32 2022 +0930
  2. 68abf0f clk/ast2600: Adjust eMMC clock names by Joel Stanley · Thu Jun 23 18:35:31 2022 +0930
  3. 50ddb95 clk/aspeed: Add debug message when clock fails by Joel Stanley · Thu Jun 23 18:35:30 2022 +0930
  4. 47b4c02 doc: replace @return by Return: by Heinrich Schuchardt · Wed Jan 19 18:05:50 2022 +0100
  5. d9c87e3 clk: ast2600: Revise MII interface delay by Dylan Hung · Thu Dec 09 10:12:28 2021 +0800
  6. b0e3cf9 clk: ast2600: Add RSACLK control for ACRY by Chia-Wei Wang · Wed Oct 27 14:17:29 2021 +0800
  7. d59cd6f clk: ast2600: Add YCLK control for HACE by Joel Stanley · Wed Oct 27 14:17:26 2021 +0800
  8. 29ff16a clk: Update drivers to use -EINVAL by Simon Glass · Thu Mar 25 10:26:08 2021 +1300
  9. 3ba929a common: Drop asm/global_data.h from common header by Simon Glass · Fri Oct 30 21:38:53 2020 -0600
  10. ce5ecc1 clk: aspeed: Add AST2600 clock support by Ryan Chen · Mon Dec 14 13:54:23 2020 +0800
  11. aad29ae dm: treewide: Rename ofdata_to_platdata() to of_to_plat() by Simon Glass · Thu Dec 03 16:55:21 2020 -0700
  12. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  13. 1e4a5c1 clock:aspeed: Sync with Linux kernel clock header define by Ryan Chen · Mon Aug 31 14:03:04 2020 +0800
  14. 5e6c9f0 cosmetic: aspeed: ast2500: Rename clock header by Ryan Chen · Mon Aug 31 14:03:03 2020 +0800
  15. 32822d0 treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr() by Masahiro Yamada · Tue Aug 04 14:14:43 2020 +0900
  16. a633f00 dm: core: Fix devfdt_get_addr_ptr return value by Ovidiu Panait · Mon Aug 03 22:17:35 2020 +0300
  17. dbd7954 common: Drop linux/delay.h from common header by Simon Glass · Sun May 10 11:40:11 2020 -0600
  18. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  19. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  20. 7d7c704 aspeed: ast2500: Read clock ofdata in the correct method by Simon Glass · Sun Dec 29 21:19:15 2019 -0700
  21. b7d76ac clk: aspeed: Add support for SD clock by Eddie James · Thu Aug 15 14:29:37 2019 -0500
  22. d7f3789 aspeed: ast2500: fix D2-PLL clock setting in RGMII mode by Cédric Le Goater · Mon Oct 29 07:06:41 2018 +0100
  23. 62b4bfd aspeed: ast2500: fix missing break in D2PLL clock enablement by Cédric Le Goater · Mon Oct 29 07:06:37 2018 +0100
  24. d6e53c7 drivers: cosmetic: Convert SPDX license tags to Linux Kernel style by Patrick Delaunay · Fri Oct 26 09:02:52 2018 +0200
  25. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  26. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  27. a91f1d2 aspeed: Refactor SCU to use consistent mask & shift by maxims@google.com · Mon Apr 17 12:00:33 2017 -0700
  28. 15016af aspeed: Add support for Clocks needed by MACs by maxims@google.com · Mon Apr 17 12:00:32 2017 -0700
  29. 995167b aspeed: Add P-Bus clock in ast2500 clock driver by maxims@google.com · Mon Apr 17 12:00:29 2017 -0700
  30. adea66c aspeed: Make SCU lock/unlock functions part of SCU API by maxims@google.com · Mon Apr 17 12:00:23 2017 -0700
  31. d067217 aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation by maxims@google.com · Mon Jan 30 11:35:04 2017 -0800
  32. 2d5a2ad aspeed: Add basic ast2500-specific drivers and configuration by maxims@google.com · Wed Jan 18 13:44:56 2017 -0800