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git01.mediatek.com / filogic / uboot / e73cc04dcd6354d7eba737f13002a129f4fae4c8 / arch / powerpc / cpu / mpc8xxx / ddr / main.c
  1. e73cc04 powerpc/mpc8xxx: Enable calculation for fixed DDR chips by York Sun · 13 years ago
  2. dd803dd powerpc/mpc8xxx: Add 16-bit support for DDR3 by York Sun · 14 years ago
  3. c68e86c powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board by Kumar Gala · 14 years ago
  4. 80ad401 8xxx/ddr: add support to only compute the ddr sdram size by Haiying Wang · 14 years ago
  5. 2d8ecac MPC8xxx DDR: align informational prints by Becky Bruce · 14 years ago
  6. 93799ca powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 by york · 14 years ago
  7. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc8xxx/ddr/main.c]
  8. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc8xxx/ddr/main.c]
  9. f4018f9 85xx, 86xx: Add common board_add_ram_info() by Peter Tyser · 15 years ago
  10. 68ef4bd fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT by Kumar Gala · 15 years ago
  11. 45eea1d fsl-ddr: Allow system to boot if we have more than 4G of memory by Kumar Gala · 16 years ago
  12. b135d93 fsl ddr skip interleaving if not supported. by Ed Swarthout · 16 years ago
  13. b834f92 Check DDR interleaving mode by Haiying Wang · 16 years ago
  14. fa44036 Pass dimm parameters to populate populate controller options by Haiying Wang · 16 years ago
  15. 272b596 Make DDR interleaving mode work correctly by Haiying Wang · 16 years ago
  16. 9dbbd7b Coding style cleanup, update CHANGELOG by Wolfgang Denk · 16 years ago
  17. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago