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git01.mediatek.com / filogic / uboot / e6a682b98def0b9b1ef5eac4ac2317eeb677f3c7 / drivers / clk / clk_rk3288.c
  1. e6a682b rockchip: rk3288: clock: Fix various minor errors by Simon Glass · 9 years ago
  2. 273afb2 rockchip: clk: Add support for clocks needed by the displays by Simon Glass · 9 years ago
  3. 5562bf1 rockchip: Rename the CRU_MODE_CON fields by Simon Glass · 9 years ago
  4. 410d45c rockchip: clk: Make rkclk_get_clk() SoC-specific by Simon Glass · 9 years ago
  5. d4a8a68 rockchip: mmc: Update the driver to use the new clock ID by Simon Glass · 9 years ago
  6. 344f366 rockchip: clock: Add a function to find a clock by ID by Simon Glass · 9 years ago
  7. 398ced1 rockchip: clk: Add a function to get a peripheral clock rate by Simon Glass · 9 years ago
  8. afe0cb0 rockchip: clock: Rename the general clock variable to gclk_rate by Simon Glass · 9 years ago
  9. 8d32f4b rockchip: Use a separate clock ID for clocks by Simon Glass · 9 years ago
  10. ecf20f6 clk: add static qualifier to local functions by Masahiro Yamada · 9 years ago
  11. 421358c rockchip: rk3288: Add clock driver by Simon Glass · 9 years ago