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git01.mediatek.com / filogic / uboot / e553eba1712ad3e5ce07f2dfdb9de605c11280d1 / drivers / net / phy / teranetics.c
  1. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  2. 6bf9ec5 net/phy: fix select line for TN80xx by Shaohui Xie · Mon Mar 25 07:39:59 2013 +0000
  3. 856f32f powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9) by Timur Tabi · Tue Oct 18 18:44:34 2011 -0500
  4. a07b497 phylib: wait for TN2020 to achieve SERDES lane alignment at startup by Timur Tabi · Fri Oct 07 15:35:21 2011 -0500
  5. 9d85174 phylib: Work around bug in Teranetics PHY by Andy Fleming · Wed Apr 20 18:41:17 2011 -0500
  6. 60ca78b phylib: Add a bunch of PHY drivers from tsec by Andy Fleming · Thu Apr 07 21:56:05 2011 -0500