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git01.mediatek.com / filogic / uboot / e521478c797454e9999d6b3532b1643321ab140a / drivers / ddr / fsl / util.c
  1. 200ba44 ddr: Remove <common.h> and add needed includes by Tom Rini · Wed May 01 19:30:40 2024 -0600
  2. bc9d46b global: Migrate CONFIG_MAX_MEM_MAPPED to CFG by Tom Rini · Sun Dec 04 10:04:50 2022 -0500
  3. 376b88a global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace by Tom Rini · Fri Oct 28 20:27:13 2022 -0400
  4. 75a6a37 treewide: Remove the unnecessary space before semicolon by Bin Meng · Wed Oct 26 12:40:07 2022 +0800
  5. bc4ef9c drivers: ddr: util.c: Fix divide by zero issue by Priyanka Singh · Thu Aug 19 11:39:01 2021 +0530
  6. dbd7954 common: Drop linux/delay.h from common header by Simon Glass · Sun May 10 11:40:11 2020 -0600
  7. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  8. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  9. d3e6816 Revert "drivers/ddr/fsl: Dual-license DDR driver" by Tom Rini · Wed Feb 14 21:34:05 2018 -0500
  10. 6d49eda drivers/ddr/fsl: Dual-license DDR driver by York Sun · Wed Feb 07 11:47:22 2018 -0800
  11. b25faa2 armv8: ls1088a: Add NXP LS1088A SoC support by Ashish Kumar · Thu Aug 31 16:12:53 2017 +0530
  12. 89e0a3a common: arm: freescale: layerscape: Move header files out of common.h by Simon Glass · Wed May 17 08:23:10 2017 -0600
  13. 243182c common: freescale: Move arch-specific declarations by Simon Glass · Wed May 17 08:23:06 2017 -0600
  14. fe84507 ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS by York Sun · Wed Dec 28 08:43:45 2016 -0800
  15. e237880 Add more SPDX-License-Identifier tags by Tom Rini · Thu Jan 14 22:05:13 2016 -0500
  16. d957a67 drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3 by York Sun · Wed Nov 04 09:53:10 2015 -0800
  17. 55eb5fa drivers/ddr/fsl: Update DDR driver for DDR4 by York Sun · Thu Mar 19 09:30:26 2015 -0700
  18. 8ced050 driver/ddr/fsl: Add sync of refresh by York Sun · Tue Jan 06 13:18:55 2015 -0800
  19. 2c0b62d driver/ddr/fsl: Add support for multiple DDR clocks by York Sun · Tue Jan 06 13:18:50 2015 -0800
  20. 79a779b driver/ddr: Restruct driver to allow standalone memory space by York Sun · Fri Aug 01 15:51:00 2014 -0700
  21. 2896cb7 driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · Thu Mar 27 17:54:47 2014 -0700
  22. c459ae6 driver/ddr: Add 256 byte interleaving support by York Sun · Mon Feb 10 13:59:44 2014 -0800
  23. 29647ab driver/ddr: Change Freescale ARM DDR driver to support both big and little endian by York Sun · Mon Feb 10 13:59:42 2014 -0800
  24. 461c939 Driver/DDR: Add Freescale DDR driver for ARM by York Sun · Mon Sep 30 14:20:51 2013 -0700
  25. a21803d Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx by York Sun · Mon Nov 18 10:29:32 2013 -0800
  26. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · Mon Sep 30 09:22:09 2013 -0700[Renamed (96%) from arch/powerpc/cpu/mpc8xxx/ddr/util.c]
  27. 992562c 8xxx: Change all 8*xx_DDR addresses to 8xxx by Andy Fleming · Tue Oct 23 19:03:46 2012 -0500
  28. a28496f powerpc/mpc85xx: software workaround for DDR erratum A-004468 by York Sun · Mon Oct 08 07:44:25 2012 +0000
  29. 016095d powerpc/mpc8xxx: Fix DDR initialization waiting for D_INIT by York Sun · Mon Oct 08 07:44:24 2012 +0000
  30. 98df4d1 powerpc/mpc8xxx: Fix DDR driver handling quad-rank DIMMs and address calculation by York Sun · Mon Oct 08 07:44:23 2012 +0000
  31. e8dc17b powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving by York Sun · Fri Aug 17 08:22:39 2012 +0000
  32. e12ce98 powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver by York Sun · Fri Aug 26 11:32:44 2011 -0700
  33. dc4d40c powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() by York Sun · Fri Aug 26 11:32:42 2011 -0700
  34. 313e827 fsl-ddr: Fix mixed-case macro names by Kyle Moffett · Thu Apr 14 13:39:30 2011 -0400
  35. e37716a fsl_ddr: Don't use full 64-bit divides on 32-bit PowerPC by Kyle Moffett · Tue Mar 15 11:23:47 2011 -0400
  36. 42d3640 fsl_ddr: Adds 16 bit DDR Data width option by Poonam Aggrwal · Mon Feb 07 15:09:51 2011 +0530
  37. b78c7bf powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq() by Kumar Gala · Mon Jan 31 20:36:02 2011 -0600
  38. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · Thu Apr 15 16:07:28 2010 +0200[Renamed from arch/ppc/cpu/mpc8xxx/ddr/util.c]
  39. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · Mon Apr 12 22:28:09 2010 -0500[Renamed from cpu/mpc8xxx/ddr/util.c]
  40. 63fa48d mpc8xxx: improve LAW error messages when setting up DDR by Paul Gortmaker · Wed Oct 07 16:34:28 2009 -0400
  41. f4018f9 85xx, 86xx: Add common board_add_ram_info() by Peter Tyser · Fri Jul 17 10:14:48 2009 -0500
  42. 68ef4bd fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT by Kumar Gala · Thu Jun 11 23:42:35 2009 -0500
  43. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · Tue Aug 26 15:01:29 2008 -0500