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git01.mediatek.com / filogic / uboot / e4c1bbf0a76d2f06d91d160c9727b08b046b5e2b / arch / arm / dts / socfpga_arria10.dtsi
  1. d5957fb ARM: dts: socfpga: Add missing SDMMC reset by Tien Fong Chee · 6 years ago
  2. 454c9b3 spi: cadence_qspi: use "cdns,qspi-nor" as compatible by Simon Goldschmidt · 6 years ago
  3. a313da3 ARM: dts: socfpga: Add missing NAND reset by Marek Vasut · 6 years ago
  4. 6544d3e ARM: dts: socfpga: Flag timer clock as pre-reloc by Marek Vasut · 6 years ago
  5. c2b2144 ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes by Marek Vasut · 6 years ago
  6. de75674 ARM: dts: socfpga: Add missing I2C resets by Marek Vasut · 6 years ago
  7. fbf9e40 ARM: dts: socfpga: Fix Arria10 GMAC resets by Marek Vasut · 6 years ago
  8. c6411f0 ARM: dts: socfpga: Add missing UART resets by Marek Vasut · 6 years ago
  9. a292bd9 ARM: dts: socfpga: Flag reset manager on A10 as pre-reloc by Marek Vasut · 6 years ago
  10. 66803de ARM: dts: socfpga: Adjust NAND register layout on Arria10 by Marek Vasut · 7 years ago
  11. 03f80b1 ARM: socfpga: Synchronize Arria10 DTs by Marek Vasut · 7 years ago
  12. feaa3f9 dts: cadence_spi: Sync DT bindings with Linux by Jason Rush · 7 years ago
  13. 2f72120 arm: dts: Add dts and dtsi for Arria 10 by Ley Foon Tan · 8 years ago