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git01.mediatek.com / filogic / uboot / e44eb3a9cf75856892c32edf7e798ba6d336289e / board / kosagi / novena / novena_spl.c
  1. a09d68a mx6: ddr: pass mx6_ddr_sysinfo to calibration routines by Eric Nelson · Sun Oct 30 16:33:48 2016 -0700
  2. cb3c121 mx6: ddr: Allow changing REFSEL and REFR fields by Fabio Estevam · Mon Aug 29 20:37:15 2016 -0300
  3. 09487ee arm: imx6: Enable DDR calibration on Novena by Marek Vasut · Wed Dec 16 15:40:07 2015 +0100
  4. f40eb78 novena: Remove empty reset_cpu() by Fabio Estevam · Mon Nov 02 22:21:34 2015 -0200
  5. 7d4dcba arm: mx6: novena: Add proper LVDS display support by Marek Vasut · Tue Dec 16 14:09:23 2014 +0100
  6. 3653e97 arm: mx6: novena: Pull GPIO definitions into header by Marek Vasut · Tue Dec 16 14:09:21 2014 +0100
  7. b4fad79 novena: Move the DCD settings to spl code by Fabio Estevam · Fri Nov 14 09:37:01 2014 -0200
  8. 91fb950 novena: Fix ethernet PHY reset sequence by Nikolay Dimitrov · Sun Oct 12 13:47:51 2014 +0300
  9. 408368f ARM: mx6: Add support for Kosagi Novena by Marek Vasut · Fri Oct 24 23:39:07 2014 +0200