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git01.mediatek.com / filogic / uboot / e22fa4f8ce413f5e9ef1dc1c095afad72516bf4e / include / fsl_esdhc_imx.h
  1. d6837b4 Revert "mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output" by Fabio Estevam · Mon Jun 07 17:40:09 2021 -0300
  2. 7818a81 mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output by Haibo Chen · Wed Mar 03 17:05:46 2021 +0800
  3. f7ed78b treewide: convert bd_t to struct bd_info by coccinelle by Masahiro Yamada · Fri Jun 26 15:13:33 2020 +0900
  4. 43162c3 mmc: fsl_esdhc_imx: disable the CMD CRC check for standard tuning by Haibo Chen · Mon Jun 22 19:38:04 2020 +0800
  5. 86a0a01 mmc: fsl_esdhc_imx: fix the mask for tuning start point by Haibo Chen · Mon Jun 22 19:38:03 2020 +0800
  6. 16b3854 mmc: fsl_esdhc_imx: drop useless code by Yangbo Lu · Fri Jun 21 11:42:30 2019 +0800
  7. 982f425 mmc: split fsl_esdhc driver for i.MX by Yangbo Lu · Fri Jun 21 11:42:27 2019 +0800