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git01.mediatek.com / filogic / uboot / e0fa55f467556d2e922c851b907732e416723e6f / arch / arm / mach-tegra / tegra210
  1. 4c3aaa7 ARM: tegra: clk_m is the architected timer source clock by Thierry Reding · Thu Aug 20 11:42:20 2015 +0200
  2. fa6e24d ARM: tegra: Implement clk_m by Thierry Reding · Thu Aug 20 11:42:19 2015 +0200
  3. 8681561 ARM: tegra: Add p2371-2180 board by Stephen Warren · Thu Aug 13 22:34:22 2015 -0600
  4. b6ba3fb tegra: Correct logic for reading pll_misc in clock_start_pll() by Simon Glass · Mon Aug 10 07:14:36 2015 -0600
  5. 952a573 ARM: tegra: Add p2371-0000 board by Stephen Warren · Wed Aug 05 11:52:08 2015 -0600
  6. 1b54a5e ARM: tegra: Add e2220-1170 board by Stephen Warren · Wed Aug 05 11:52:07 2015 -0600
  7. a8480ef Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. by Tom Warren · Thu Jun 25 09:50:44 2015 -0700
  8. 27bce71 Tegra: clocks: Add 38.4MHz OSC support for T210 use by Tom Warren · Mon Jun 22 13:03:44 2015 -0700
  9. 22425c9 T210: Add support for 64-bit T210-based P2571 board by Tom Warren · Thu Feb 12 15:01:49 2015 -0700
  10. f80dd82 ARM: Tegra210: Add SoC code/include files for T210 by Tom Warren · Mon Feb 02 13:22:29 2015 -0700
  11. f55fdec ARM: tegra: pinctrl: move Tegra210 code to the correct dir by Stephen Warren · Wed Mar 25 12:04:34 2015 -0600