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git01.mediatek.com / filogic / uboot / e0098b37e8ef439be12d3ae96bd5afea09077ba9 / drivers / ddr / fsl / main.c
  1. 79a779b driver/ddr: Restruct driver to allow standalone memory space by York Sun · 10 years ago
  2. edbeee1 drivers/ddr: Fix possible out of bounds error by York Sun · 11 years ago
  3. 2896cb7 driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · 11 years ago
  4. c459ae6 driver/ddr: Add 256 byte interleaving support by York Sun · 11 years ago
  5. 3a0916d Driver/ddr: Add support of different DDR base address by York Sun · 11 years ago
  6. 6446f1e Driver/DDR: Update DDR driver to allow non-zero base address by York Sun · 11 years ago
  7. 461c939 Driver/DDR: Add Freescale DDR driver for ARM by York Sun · 11 years ago
  8. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · 11 years ago[Renamed (99%) from arch/powerpc/cpu/mpc8xxx/ddr/main.c]
  9. 993967a mpc8xxx: call i2c_set_bus_num in __get_spd by Valentin Longchamp · 11 years ago
  10. 4a71741 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · 11 years ago
  11. 3adfb91 powerpc: Use print_size() where appropriate by Shruti Kanetkar · 11 years ago
  12. 5e15555 powerpc/mpc8xxx: Add memory reset control by York Sun · 11 years ago
  13. c21a739 powerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff by York Sun · 11 years ago
  14. 01a8258 powerpc/mpc8xxx: Allow board file to override DDR address assignment by York Sun · 12 years ago
  15. fcb60e8 powerpc/mpc8xxx: Fix DDR 3-way interleaving by York Sun · 12 years ago
  16. 4379438 powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands by James Yang · 12 years ago
  17. 5025a8d powerpc/mpc8xxx: Enable entering DDR debugging by key press by York Sun · 12 years ago
  18. 9b9372f powerpc/mpc8xxx: Fix DDR SPD failed message by York Sun · 12 years ago
  19. 016095d powerpc/mpc8xxx: Fix DDR initialization waiting for D_INIT by York Sun · 12 years ago
  20. 11dd884 powerpc/mpc8xxx DDR: Fall back to raw timing for first controller only by York Sun · 12 years ago
  21. e8dc17b powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving by York Sun · 12 years ago
  22. 2400904 powerpc/ddr: fix fsl_ddr_get_dimm_params compile error by Shaohui Xie · 12 years ago
  23. bd495cf powerpc/8xxx: Add support for interactive DDR programming interface by York Sun · 13 years ago
  24. 92b46ac powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots by York Sun · 13 years ago
  25. 09d8aa8 powerpc/mpc8xxx: Adding fallback to raw timing on supported boards by York Sun · 13 years ago
  26. e73cc04 powerpc/mpc8xxx: Enable calculation for fixed DDR chips by York Sun · 13 years ago
  27. dd803dd powerpc/mpc8xxx: Add 16-bit support for DDR3 by York Sun · 14 years ago
  28. c68e86c powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board by Kumar Gala · 14 years ago
  29. 80ad401 8xxx/ddr: add support to only compute the ddr sdram size by Haiying Wang · 14 years ago
  30. 2d8ecac MPC8xxx DDR: align informational prints by Becky Bruce · 14 years ago
  31. 93799ca powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 by york · 14 years ago
  32. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc8xxx/ddr/main.c]
  33. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc8xxx/ddr/main.c]
  34. f4018f9 85xx, 86xx: Add common board_add_ram_info() by Peter Tyser · 15 years ago
  35. 68ef4bd fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT by Kumar Gala · 15 years ago
  36. 45eea1d fsl-ddr: Allow system to boot if we have more than 4G of memory by Kumar Gala · 16 years ago
  37. b135d93 fsl ddr skip interleaving if not supported. by Ed Swarthout · 16 years ago
  38. b834f92 Check DDR interleaving mode by Haiying Wang · 16 years ago
  39. fa44036 Pass dimm parameters to populate populate controller options by Haiying Wang · 16 years ago
  40. 272b596 Make DDR interleaving mode work correctly by Haiying Wang · 16 years ago
  41. 9dbbd7b Coding style cleanup, update CHANGELOG by Wolfgang Denk · 16 years ago
  42. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago