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git01.mediatek.com
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filogic
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uboot
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dc52054b7ef69f45ce53bb68131f11266227e821
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drivers
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clk
/
aspeed
dec7ea0
Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"
by Tom Rini
· Mon May 20 13:35:03 2024 -0600
abb9a04
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""
by Tom Rini
· Sat May 18 20:20:43 2024 -0600
32fa621
clk: Remove <common.h> and add needed includes
by Tom Rini
· Wed May 01 19:30:36 2024 -0600
d318eb3
treewide: Remove clk_free
by Sean Anderson
· Sat Dec 16 14:38:42 2023 -0500
1a3427b
clk: treewide: switch to clock dump from clk_ops
by Igor Prusov
· Thu Nov 09 13:55:15 2023 +0300
43d8518
clk: ast2600: Move soc_clk_dump function
by Igor Prusov
· Thu Nov 09 13:55:10 2023 +0300
53281e9
clk: ast2600: Keep PLL power on
by Dylan Hung
· Tue Feb 21 21:01:10 2023 +0800
b4c47fd
clk: aspeed: Get HCLK frequency support
by Chin-Ting Kuo
· Fri Aug 19 17:01:02 2022 +0800
dd8c084
clk/ast2500: Add SD clock
by Joel Stanley
· Thu Jun 23 18:35:32 2022 +0930
68abf0f
clk/ast2600: Adjust eMMC clock names
by Joel Stanley
· Thu Jun 23 18:35:31 2022 +0930
50ddb95
clk/aspeed: Add debug message when clock fails
by Joel Stanley
· Thu Jun 23 18:35:30 2022 +0930
47b4c02
doc: replace @return by Return:
by Heinrich Schuchardt
· Wed Jan 19 18:05:50 2022 +0100
d9c87e3
clk: ast2600: Revise MII interface delay
by Dylan Hung
· Thu Dec 09 10:12:28 2021 +0800
b0e3cf9
clk: ast2600: Add RSACLK control for ACRY
by Chia-Wei Wang
· Wed Oct 27 14:17:29 2021 +0800
d59cd6f
clk: ast2600: Add YCLK control for HACE
by Joel Stanley
· Wed Oct 27 14:17:26 2021 +0800
29ff16a
clk: Update drivers to use -EINVAL
by Simon Glass
· Thu Mar 25 10:26:08 2021 +1300
3ba929a
common: Drop asm/global_data.h from common header
by Simon Glass
· Fri Oct 30 21:38:53 2020 -0600
ce5ecc1
clk: aspeed: Add AST2600 clock support
by Ryan Chen
· Mon Dec 14 13:54:23 2020 +0800
aad29ae
dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
by Simon Glass
· Thu Dec 03 16:55:21 2020 -0700
8a2b47f
dm: treewide: Rename auto_alloc_size members to be shorter
by Simon Glass
· Thu Dec 03 16:55:17 2020 -0700
1e4a5c1
clock:aspeed: Sync with Linux kernel clock header define
by Ryan Chen
· Mon Aug 31 14:03:04 2020 +0800
5e6c9f0
cosmetic: aspeed: ast2500: Rename clock header
by Ryan Chen
· Mon Aug 31 14:03:03 2020 +0800
32822d0
treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()
by Masahiro Yamada
· Tue Aug 04 14:14:43 2020 +0900
a633f00
dm: core: Fix devfdt_get_addr_ptr return value
by Ovidiu Panait
· Mon Aug 03 22:17:35 2020 +0300
dbd7954
common: Drop linux/delay.h from common header
by Simon Glass
· Sun May 10 11:40:11 2020 -0600
0f2af88
common: Drop log.h from common header
by Simon Glass
· Sun May 10 11:40:05 2020 -0600
d66c5f7
dm: core: Require users of devres to include the header
by Simon Glass
· Mon Feb 03 07:36:15 2020 -0700
7d7c704
aspeed: ast2500: Read clock ofdata in the correct method
by Simon Glass
· Sun Dec 29 21:19:15 2019 -0700
b7d76ac
clk: aspeed: Add support for SD clock
by Eddie James
· Thu Aug 15 14:29:37 2019 -0500
d7f3789
aspeed: ast2500: fix D2-PLL clock setting in RGMII mode
by Cédric Le Goater
· Mon Oct 29 07:06:41 2018 +0100
62b4bfd
aspeed: ast2500: fix missing break in D2PLL clock enablement
by Cédric Le Goater
· Mon Oct 29 07:06:37 2018 +0100
d6e53c7
drivers: cosmetic: Convert SPDX license tags to Linux Kernel style
by Patrick Delaunay
· Fri Oct 26 09:02:52 2018 +0200
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
ba1dea4
dm: Rename dev_addr..() functions
by Simon Glass
· Wed May 17 17:18:05 2017 -0600
a91f1d2
aspeed: Refactor SCU to use consistent mask & shift
by maxims@google.com
· Mon Apr 17 12:00:33 2017 -0700
15016af
aspeed: Add support for Clocks needed by MACs
by maxims@google.com
· Mon Apr 17 12:00:32 2017 -0700
995167b
aspeed: Add P-Bus clock in ast2500 clock driver
by maxims@google.com
· Mon Apr 17 12:00:29 2017 -0700
adea66c
aspeed: Make SCU lock/unlock functions part of SCU API
by maxims@google.com
· Mon Apr 17 12:00:23 2017 -0700
d067217
aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation
by maxims@google.com
· Mon Jan 30 11:35:04 2017 -0800
2d5a2ad
aspeed: Add basic ast2500-specific drivers and configuration
by maxims@google.com
· Wed Jan 18 13:44:56 2017 -0800