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git01.mediatek.com / filogic / uboot / dc25d15c40c727e28d2550f05fd375853b12a501 / doc / README.440-DDR-performance
  1. e335ee0 PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performance by Stefan Roese ยท Fri Jul 28 18:34:58 2006 +0200