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git01.mediatek.com / filogic / uboot / da8f8ef98102708e475851cc2636ecf3339737b5 / arch / arm / dts / socfpga_arria10_socdk.dtsi
  1. a77d9f8 ARM: socfpga: Make DRAM node available in SPL by Marek Vasut · Tue May 29 18:02:22 2018 +0200
  2. 03f80b1 ARM: socfpga: Synchronize Arria10 DTs by Marek Vasut · Mon Apr 23 01:37:57 2018 +0200