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git01.mediatek.com / filogic / uboot / da3ae1feb080fbcabfabd19fe669b5fd4234af64 / drivers / ram / aspeed / sdram_ast2600.c
  1. eb80b31 ram: ast2600: Keep MPLL power on by Dylan Hung · Tue Feb 21 21:01:09 2023 +0800
  2. 364d002 global: Finish CONFIG -> CFG migration by Tom Rini · Tue Jan 10 11:19:45 2023 -0500
  3. bb4dd96 global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* by Tom Rini · Wed Nov 16 13:10:37 2022 -0500
  4. e10c8d6 ram: ast2600: Align the RL and WL setting by Dylan Hung · Fri Nov 11 15:30:08 2022 +0800
  5. e7f6784 ram: ast2600: Improve ddr4 timing and signal quality by Dylan Hung · Fri Nov 11 15:30:07 2022 +0800
  6. d90da02 ram: ast2600: Fix incorrect statement of the register polling by Dylan Hung · Fri Nov 11 15:30:06 2022 +0800
  7. 3ba929a common: Drop asm/global_data.h from common header by Simon Glass · Fri Oct 30 21:38:53 2020 -0600
  8. 8247002 ram: aspeed: Add AST2600 DRAM control support by Dylan Hung · Mon Dec 14 13:54:24 2020 +0800