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git01.mediatek.com / filogic / uboot / d99c1657ec0e386e0bf89bb49368102a37226483 / board / opalkelly / zynq / zynq-syzygy-hub
  1. 3fd6633 WS cleanup: remove trailing empty lines by Wolfgang Denk · Mon Sep 27 17:42:36 2021 +0200
  2. 79c1f6d arm: zynq: Remove low level UART setting by Michal Simek · Fri Dec 06 09:33:25 2019 +0100
  3. 70df9d6 SPDX: Convert a few files that were missed before by Tom Rini · Mon May 07 17:02:21 2018 -0400
  4. 322b57b arm: zynq: Convert all board to use arch ps7_init code by Michal Simek · Fri Nov 10 11:00:42 2017 +0100
  5. c59949e arm: zynq: Get rid of ps7_reset_apu() for syzygy board by Michal Simek · Fri Nov 10 09:51:17 2017 +0100
  6. 3924efd arm: zynq: Remove ps7_debug code by Michal Simek · Fri Nov 10 09:09:48 2017 +0100
  7. 91d024c arm: zynq: Add support for SYZYGY Hub board by Tom McLeod · Wed Sep 27 17:53:26 2017 -0700