1. f245164 clk: mediatek: mt7981: rename CK to CLK by Christian Marangi · Fri Aug 02 15:53:15 2024 +0200
  2. 9435d81 clk: mediatek: mt7981: convert to unified infracfg gates + muxes by Christian Marangi · Fri Aug 02 15:53:14 2024 +0200
  3. 8199eeb clk: mediatek: mt7981: fix support for pwm3 clock by Christian Marangi · Fri Aug 02 15:53:13 2024 +0200
  4. 8247bfd clk: mediatek: mt7981: replace infracfg ID with upstream linux by Christian Marangi · Fri Aug 02 15:53:12 2024 +0200
  5. bc63482 clk: mediatek: mt7981: drop 1/1 spurious factor by Christian Marangi · Fri Aug 02 15:53:11 2024 +0200
  6. be9dbee clk: mediatek: mt7981: implement sgmii0/1 clock by Christian Marangi · Fri Aug 02 15:53:10 2024 +0200
  7. 52726b5 clk: mediatek: mt7981: fix wrong parent list for INFRA_PWM1_SEL mux by Christian Marangi · Fri Aug 02 15:53:09 2024 +0200
  8. f8117ac clk: mediatek: mt7981: fix wrong parent for TOP_FAUD clock by Christian Marangi · Fri Aug 02 15:53:08 2024 +0200
  9. 046faee clk: mediatek: mt7981: fix wrong mux width for pwm2 and pwm1 clock by Christian Marangi · Fri Aug 02 15:53:04 2024 +0200
  10. 4fd1445 clk: mediatek: mt7981: fix typo for infra_i2c0_ck by Christian Marangi · Fri Aug 02 15:53:03 2024 +0200
  11. 14077e7 clk: mediatek: mt7981: add missing clock for infra_ipcie_pipe by Christian Marangi · Fri Aug 02 15:53:02 2024 +0200
  12. 8cba8f0 clk: mediatek: mt7981: support alternative compatible for fixed-plls by Christian Marangi · Mon Jun 24 23:03:35 2024 +0200
  13. 79128da clk: mediatek: add clock driver support for MediaTek MT7981 SoC by developer · Fri Sep 09 20:00:12 2022 +0800