Log - d882ff11bc9ae5e33eb2bf87ffdde718aa175fb1 - filogic/uboot

b6ba490 ARM: socfpga: Pull PL310 clearing into common code by Marek Vasut · Thu Mar 21 23:05:38 2019 +0100
713a8a2 ARM: socfpga: Add support for selecting bridges in bridge command by Marek Vasut · Tue Apr 16 22:28:08 2019 +0200
ff14f16 arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table by Ang, Chee Hong · Wed Dec 19 18:35:15 2018 -0800
da13a0a arm: socfpga: fix SPL booting from fpga OnChip RAM by Simon Goldschmidt · Wed Oct 10 14:55:23 2018 +0200
8fdb419 ARM: socfpga: Reorder Arria10 SPL by Marek Vasut · Sat Aug 18 19:11:52 2018 +0200
8b73c87 ARM: socfpga: Zap all the UART handling complexity by Marek Vasut · Sun Apr 15 16:29:12 2018 +0200
8e30203 arm: socfpga: gen5: combine some init code for SPL and U-Boot by Simon Goldschmidt · Mon Aug 13 21:34:35 2018 +0200
4cc6b58 arm: socfpga: misc: Move bridge command to misc common by Ley Foon Tan · Thu May 24 00:17:23 2018 +0800
10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
cfd0c54 arm: socfpga: Add misc support for Arria 10 by Ley Foon Tan · Wed Apr 26 02:44:43 2017 +0800
b149f2b arm: socfpga: Restructure misc driver by Ley Foon Tan · Wed Apr 26 02:44:36 2017 +0800