1. d7db004 x86: apl: Add P2SB driver by Simon Glass · Sun Dec 08 17:40:16 2019 -0700
  2. 43aae57 x86: apl: Add SPL/TPL init by Simon Glass · Sun Dec 08 17:40:15 2019 -0700
  3. fcfd26e x86: apl: Add a CPU driver by Simon Glass · Sun Dec 08 17:40:14 2019 -0700
  4. c914f19 x86: apl: Add SPL loaders by Simon Glass · Sun Dec 08 17:40:13 2019 -0700
  5. 45122ae x86: apl: Add PUNIT driver by Simon Glass · Sun Dec 08 17:40:11 2019 -0700
  6. 471e28c x86: apl: Add PCH driver by Simon Glass · Sun Dec 08 17:40:10 2019 -0700
  7. 36a6cf3 x86: apl: Add LPC driver by Simon Glass · Sun Dec 08 17:40:09 2019 -0700
  8. 8c0629b x86: apl: Add ITSS driver by Simon Glass · Sun Dec 08 17:40:08 2019 -0700
  9. 99c1904 x86: apl: Add hostbridge driver by Simon Glass · Sun Dec 08 17:40:07 2019 -0700
  10. dc79691 x86: apl: Add systemagent driver by Simon Glass · Sun Dec 08 17:32:10 2019 -0700
  11. 34f94ec x86: apl: Add pinctrl driver by Simon Glass · Sun Dec 08 17:32:08 2019 -0700
  12. 582ba6e x86: apl: Add UART driver by Simon Glass · Fri Dec 06 21:42:58 2019 -0700
  13. e63ca97 x86: apl: Add PMC driver by Simon Glass · Fri Dec 06 21:42:57 2019 -0700
  14. 7c4ae82 x86: apl: Add basic IO addresses by Simon Glass · Fri Dec 06 21:42:56 2019 -0700
  15. 4c8243d x86: Move qemu CPU fixup function into its own file by Simon Glass · Fri Dec 06 21:42:55 2019 -0700
  16. 837a66a x86: Add a generic Intel pinctrl driver by Simon Glass · Fri Dec 06 21:42:53 2019 -0700
  17. 6629837 x86: Add low-power subsystem (lpss) support by Simon Glass · Fri Dec 06 21:42:52 2019 -0700
  18. c93fd57 x86: Make MSR_PKG_POWER_SKU common by Simon Glass · Fri Dec 06 21:42:34 2019 -0700
  19. 79c8732 x86: Separate out U-Boot and device tree in ROM image by Simon Glass · Fri Dec 06 21:42:33 2019 -0700
  20. 014c66f x86: Don't repeat microcode in U-Boot if not needed by Simon Glass · Fri Dec 06 21:42:32 2019 -0700
  21. 8d54388 x86: Add an fdtmap and image-header by Simon Glass · Fri Dec 06 21:42:31 2019 -0700
  22. 4d7a923 x86: Add an option to control the position of SPL by Simon Glass · Fri Dec 06 21:42:30 2019 -0700
  23. 20af0ff x86: Add an option to control the position of U-Boot by Simon Glass · Fri Dec 06 21:42:29 2019 -0700
  24. f8dc7f4 x86: Update .dtsi file for FSP2 by Simon Glass · Fri Dec 06 21:42:28 2019 -0700
  25. 3c4b98f x86: Disable microcode section for FSP2 by Simon Glass · Fri Dec 06 21:42:26 2019 -0700
  26. 8f963e1 x86: Add support for newer CAR schemes by Simon Glass · Fri Dec 06 21:42:25 2019 -0700
  27. 7dbabbb x86: Add an option to include a FIT by Simon Glass · Fri Dec 06 21:42:24 2019 -0700
  28. e8e014c x86: Don't include the BIOS emulator in TPL by Simon Glass · Fri Dec 06 21:42:23 2019 -0700
  29. 2cf3a5a x86: fsp: Make the notify API call common by Simon Glass · Fri Dec 06 21:42:22 2019 -0700
  30. 26561da x86: fsp: Allow remembering the location of FSP-S by Simon Glass · Fri Dec 06 21:42:21 2019 -0700
  31. adee5ea x86: fsp: Set up an MTRR for the graphics frame buffer by Simon Glass · Fri Dec 06 21:42:19 2019 -0700
  32. 466c785 x86: fsp: Add FSP2 base support by Simon Glass · Fri Dec 06 21:42:18 2019 -0700
  33. 58a23fb x86: fsp: Correct wrong header inlude in fsp_support.c by Simon Glass · Fri Dec 06 21:42:17 2019 -0700
  34. 8965ef2 x86: fsp: Make graphics support common to FSP1/2 by Simon Glass · Fri Dec 06 21:42:16 2019 -0700
  35. 25271ae x86: Allow interrupt to happen once by Simon Glass · Fri Dec 06 21:42:15 2019 -0700
  36. 8ccadee x86: Set up the MTRR for SDRAM by Simon Glass · Fri Dec 06 21:42:12 2019 -0700
  37. 75545f7 x86: Set the DRAM banks to reflect real location by Simon Glass · Fri Dec 06 21:42:11 2019 -0700
  38. 9de1027 x86: Move fsp_prepare_mrc_cache() to fsp1 directory by Simon Glass · Fri Dec 06 21:42:10 2019 -0700
  39. 6e1b956 x86: Don't export mrccache_update() by Simon Glass · Fri Dec 06 21:42:09 2019 -0700
  40. b5b0aff x86: Add mrccache support for a 'variable' cache by Simon Glass · Fri Dec 06 21:42:08 2019 -0700
  41. 91efff5 x86: Update mrccache to support multiple caches by Simon Glass · Fri Dec 06 21:42:07 2019 -0700
  42. 1b9d815 x86: Tidy up error handling in mrccache_save() by Simon Glass · Fri Dec 06 21:42:06 2019 -0700
  43. c3d0c23 x86: Add a new global_data member for the cache record by Simon Glass · Fri Dec 06 21:42:05 2019 -0700
  44. 4e988f9 x86: Adjust mrccache_get_region() to support get_mmap() by Simon Glass · Fri Dec 06 21:42:04 2019 -0700
  45. 9d25f2e x86: Adjust mrccache_get_region() to use livetree by Simon Glass · Fri Dec 06 21:42:03 2019 -0700
  46. d553f97 x86: Correct mrccache find_next_mrc_cache() calculation by Simon Glass · Fri Dec 06 21:42:02 2019 -0700
  47. 91c0736 x86: Reduce mrccache record alignment size by Simon Glass · Fri Dec 06 21:42:01 2019 -0700
  48. 7a13138 x86: Define the SPL image start by Simon Glass · Fri Dec 06 21:42:00 2019 -0700
  49. ff418d9 x86: Move UCLASS_IRQ into a separate file by Simon Glass · Fri Dec 06 21:41:58 2019 -0700
  50. a53cffe x86: Drop unnecessary interrupt code for TPL by Simon Glass · Fri Dec 06 21:41:52 2019 -0700
  51. dd45a7a x86: Drop unnecessary cpu code for TPL by Simon Glass · Fri Dec 06 21:41:51 2019 -0700
  52. d3edd42 x86: timer: use a timer base of 0 by Simon Glass · Fri Dec 06 21:41:49 2019 -0700
  53. ec1a30c x86: spi: Add helper functions for Intel Fast SPI by Simon Glass · Fri Dec 06 21:41:43 2019 -0700
  54. f5bdce2 i2c: designware: Avoid using static data by Simon Glass · Fri Dec 06 21:41:41 2019 -0700
  55. 80f283b x86: simplify ljmp to 32-bit code by Masahiro Yamada · Tue Dec 03 14:28:58 2019 +0900
  56. 19f2a6d x86: use data32 directive instead of macro for operand-size prefix by Masahiro Yamada · Tue Dec 03 14:20:49 2019 +0900
  57. 6980b6b common: Move board_get_usable_ram_top() out of common.h by Simon Glass · Thu Nov 14 12:57:45 2019 -0700
  58. 8f3f761 common: Move enable/disable_interrupts out of common.h by Simon Glass · Thu Nov 14 12:57:42 2019 -0700
  59. 9b61c7c common: Move interrupt functions into a new header by Simon Glass · Thu Nov 14 12:57:41 2019 -0700
  60. 6333448 common: Move ARM cache operations out of common.h by Simon Glass · Thu Nov 14 12:57:39 2019 -0700
  61. 1d91ba7 common: Move some cache and MMU functions out of common.h by Simon Glass · Thu Nov 14 12:57:37 2019 -0700
  62. 1fa70f8 common: Move checkcpu() out of common.h by Simon Glass · Thu Nov 14 12:57:34 2019 -0700
  63. 2d91068 x86: Quieten TPL's jump_to_image_no_args() by Simon Glass · Sun Oct 20 21:37:57 2019 -0600
  64. 662c17d x86: Don't print CPU info in TPL by Simon Glass · Sun Oct 20 21:37:56 2019 -0600
  65. 81f1462 x86: Move CPU init to before spl_init() by Simon Glass · Sun Oct 20 21:37:55 2019 -0600
  66. dc44467 x86: Add a CPU init function for TPL by Simon Glass · Sun Oct 20 21:37:54 2019 -0600
  67. 7b8a558 x86: tpl: Add a fake PCI bus by Simon Glass · Sun Oct 20 21:37:50 2019 -0600
  68. 0b3c576 x86: spl: Support init of a PUNIT by Simon Glass · Sun Oct 20 21:37:49 2019 -0600
  69. ed10a4f x86: timer: Use a separate flag for whether timer is inited by Simon Glass · Sun Oct 20 21:37:47 2019 -0600
  70. abab18c binman: x86: Separate out 16-bit reset and init code by Simon Glass · Sat Aug 24 07:22:49 2019 -0600
  71. 23c2ea96 x86: Reduce resetvec size by Simon Glass · Wed Sep 25 09:00:31 2019 -0600
  72. d96544d x86: Drop RESET_SEG_SIZE by Simon Glass · Wed Sep 25 08:57:23 2019 -0600
  73. e6f5c32 x86: Drop RESET_BASE by Simon Glass · Wed Sep 25 08:57:22 2019 -0600
  74. 1efffd6 x86: Update Kconfig options for FSP1 by Simon Glass · Wed Sep 25 08:57:14 2019 -0600
  75. 040bef1 x86: Add a function to find the size of an mrccache record by Simon Glass · Wed Sep 25 08:57:04 2019 -0600
  76. 11ba714 x86: Panic when SPL or TPL fail by Simon Glass · Wed Sep 25 08:56:51 2019 -0600
  77. a72a7ab x86: Use mtrr_commit() with FSP2 by Simon Glass · Wed Sep 25 08:56:49 2019 -0600
  78. 212ee45 x86: cpu: Don't include the cpu driver in TPL by Simon Glass · Wed Sep 25 08:56:48 2019 -0600
  79. 753297d x86: Add a function to set variable MTRRs by Simon Glass · Wed Sep 25 08:56:46 2019 -0600
  80. 3552059 x86: Refactor mtrr_commit() to allow for shared code by Simon Glass · Wed Sep 25 08:56:45 2019 -0600
  81. d164213 x86: Allow the PCH and LPC uclasses to work with of-platdata by Simon Glass · Wed Sep 25 08:56:43 2019 -0600
  82. a016368 x86: Add new common CPU functions for turbo/burst mode by Simon Glass · Wed Sep 25 08:56:40 2019 -0600
  83. 05e85b9 x86: Tidy up some duplicate MSR defines by Simon Glass · Wed Sep 25 08:56:39 2019 -0600
  84. b12689d x86: Add common functions for TDP and perf control by Simon Glass · Wed Sep 25 08:56:38 2019 -0600
  85. 4347d83 x86: Use a common bus clock for Intel CPUs by Simon Glass · Wed Sep 25 08:56:37 2019 -0600
  86. 23a6ca9 x86: Add a common function to set CPU thermal target by Simon Glass · Wed Sep 25 08:56:36 2019 -0600
  87. 76ae027 x86: Use a common definition of MSR_IA32_PERF_CTL by Simon Glass · Wed Sep 25 08:56:35 2019 -0600
  88. a546458 x86: pci: Drop the first parameter in pci_x86_r/w_config() by Simon Glass · Sat Aug 31 21:23:18 2019 -0600
  89. 5c2aabf x86: Move acpi_s3.h to a common location by Simon Glass · Wed Sep 25 08:56:32 2019 -0600
  90. 7ab72de x86: Rename turbo ratio MSR to MSR_TURBO_RATIO_LIMIT by Simon Glass · Wed Sep 25 08:11:47 2019 -0600
  91. ca1c61e x86: Add various MTRR indexes and values by Simon Glass · Wed Sep 25 08:11:46 2019 -0600
  92. 202a096 x86: Add more comments to the start-up code by Simon Glass · Wed Sep 25 08:11:44 2019 -0600
  93. 9e60b43 x86: Change condition for using CAR by Simon Glass · Wed Sep 25 08:11:43 2019 -0600
  94. 2562808 x86: fsp: Save usable RAM and hob_list in the handoff area by Simon Glass · Wed Sep 25 08:11:41 2019 -0600
  95. 42bf3b9 x86: spl: Move broadwell-specific code out of generic x86 spl by Simon Glass · Wed Sep 25 08:11:40 2019 -0600
  96. 19da9c4 x86: spl: Reduce priority of the basic SPL image loader by Simon Glass · Wed Sep 25 08:11:39 2019 -0600
  97. 39c6f9b x86: spl: Use hang() instead of a while() loop by Simon Glass · Wed Sep 25 08:11:38 2019 -0600
  98. 7567787 x86: pci: Add a function to clear and set PCI config regs by Simon Glass · Wed Sep 25 08:11:37 2019 -0600
  99. 5a4e018 x86: Add binman symbols to the image by Simon Glass · Wed Sep 25 08:11:36 2019 -0600
  100. aba3c60 x86: Move common Intel CPU info code into a function by Simon Glass · Wed Sep 25 08:11:35 2019 -0600