Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / d6e428a744d4e9905577ec69c1da97f24b5dc5be / drivers / spi / zynq_spi.c
  1. 505dcd2 Merge branch 'master' of git://git.denx.de/u-boot-spi by Tom Rini · Thu Sep 22 11:36:45 2016 -0400
  2. ebbac2f spi: zynq: Use variable to remove u32 to u64 conversions by Michal Simek · Thu Sep 01 12:51:27 2016 +0200
  3. 636ef59 spi: zynq_spi: Fix infinite looping while xfer by Lad, Prabhakar · Sat Jul 30 22:28:24 2016 +0100
  4. 8eb23ec spi: zynq_spi: Add cadence compatible string by Michal Simek · Mon Dec 07 13:06:54 2015 +0100
  5. e1af6ae spi: zynq_[q]spi: Use GENMASK macro by Jagan Teki · Thu Oct 22 21:06:37 2015 +0530
  6. f94b3f7 spi: zynq_[q]spi: Use BIT macro by Jagan Teki · Thu Oct 22 20:40:16 2015 +0530
  7. 697cdaa spi: zynq_spi: Remove unneeded headers by Jagan Teki · Wed Sep 02 11:39:45 2015 +0530
  8. 12c941e spi: zynq_spi: Store cs value into private data by Jagan Teki · Mon Aug 17 18:31:39 2015 +0530
  9. 08dd095 spi: zynq_spi: Rename baudrate divisor mask name by Jagan Teki · Mon Aug 17 18:27:47 2015 +0530
  10. be47fc3 spi: zynq_spi: Add config reg shift named macros by Jagan Teki · Mon Aug 17 18:25:03 2015 +0530
  11. a61e216 spi: zynq_spi: Fix to configure CPOL, CPHA mask by Jagan Teki · Tue Sep 08 01:38:50 2015 +0530
  12. 0971778 dm: Use dev_get_addr() where possible by Simon Glass · Tue Aug 11 08:33:29 2015 -0600
  13. 2e0ddea spi: zynq_spi: Simplify debug macro by Michal Simek · Tue Jul 21 07:54:11 2015 +0200
  14. 0cf97aa spi: Fix zynq SPI binding by Michal Simek · Wed Jul 22 10:47:33 2015 +0200
  15. 8208163 spi: zynq_spi: Add fdt support in driver by Jagan Teki · Sat Jun 27 00:51:34 2015 +0530
  16. f212576 dm: spi: zynq_spi: Convert to driver model by Jagan Teki · Sat Jun 27 00:51:31 2015 +0530
  17. 778079a zynq: spi: Remove unnecessary error condition by Siva Durga Prasad Paladugu · Wed Apr 15 13:13:28 2015 +0200
  18. 216ec09 spi: Add zynq spi controller driver by Jagannadha Sutradharudu Teki · Mon Jul 29 23:45:16 2013 +0530