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git01.mediatek.com / filogic / uboot / d68c461341c0a0c58946a131b93b3910396ed887 / arch / arm / include / asm / arch-sunxi / clock_sun6i.h
  1. 015051d ARM: sunxi: Add clock and uart to sunxi headers by Icenowy Zheng · Sat Jan 29 10:23:03 2022 -0500
  2. 30213a2 sunxi: R40: add gigabit ethernet clocks by Lothar Felten · Fri Jul 13 10:45:25 2018 +0200
  3. 9ae2306 sunxi: Fix USB PHY index for H3 by Jagan Teki · Thu Jun 28 19:40:45 2018 +0530
  4. c4d3ae9 sunxi: clock: Fix EHCI and OHCI clocks on A64 by Vasily Khoruzhick · Thu Jun 07 19:23:38 2018 -0700
  5. 5cc66f0 sunxi: clock: Fix OHCI clock gating for H3/H5 by Chen-Yu Tsai · Mon May 07 13:03:24 2018 +0530
  6. 75fa310 sunxi: clock: Fix clock gating for H3/H5/A64 by Jagan Teki · Mon May 07 13:03:21 2018 +0530
  7. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  8. 78f1099 sunxi: allow NAND support to be compiled for sun8i platforms by Miquel Raynal · Wed Feb 28 20:51:57 2018 +0100
  9. 48edd46 sunxi: Add clock support for TV encoder by Jernej Skrabec · Wed May 10 18:46:29 2017 +0200
  10. 3279661 sunxi: add clock configuration of R40 sata by Icenowy Zheng · Mon May 01 14:31:56 2017 +0800
  11. 9b4ca92 sunxi: Add clock support for DE2/HDMI/TCON on newer SoCs by Jernej Skrabec · Mon Mar 27 19:22:31 2017 +0200
  12. 5eddcbb sunxi: Set PLL lock enable bits for R40 by Chen-Yu Tsai · Wed Nov 30 16:54:34 2016 +0800
  13. 5fb9743 sunxi: prepare for sharing MACH_SUN8I_H3 config symbol by Andre Przywara · Thu Feb 16 01:20:27 2017 +0000
  14. f613817 sunxi: A64: use H3 DRAM initialization code for A64 as well by Jens Kuske · Mon Jan 02 11:48:42 2017 +0000
  15. 213407e sunxi: Tune H3 DRAM PLL to improve lock time by Jens Kuske · Fri Aug 19 13:40:46 2016 +0200
  16. d194c0e net: Add EMAC driver for H3/A83T/A64 SoCs. by Amit Singh Tomar · Wed Jul 06 17:59:44 2016 +0530
  17. 2c885e9 sunxi: Downclock AHB1 to 100MHz on Allwinner A64 by Siarhei Siamashka · Tue May 31 01:48:05 2016 +0300
  18. 26c50fb sunxi: Add support for Allwinner A64 SoCs by Siarhei Siamashka · Tue Mar 29 17:29:10 2016 +0200
  19. a1f5d11 sunxi: H3: Add support for the host usb-phys by Jelle van der Waa · Tue Feb 09 23:59:33 2016 +0100
  20. 6daddfe sunxi: Support H3 CCU security switches by Chen-Yu Tsai · Wed Jan 06 15:13:07 2016 +0800
  21. ff308f8 sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs by Hans de Goede · Fri Nov 20 19:29:49 2015 +0100
  22. 2b8bd91 sunxi: clock: Set AHB1 clock frequency to 200MHz on Allwinner H3 by Siarhei Siamashka · Fri Nov 20 07:07:48 2015 +0200
  23. 53f018e sunxi: Add H3 DRAM initialization support by Jens Kuske · Tue Nov 17 15:12:59 2015 +0100
  24. d6eaadc sun6i: clock: Add support for the mipi pll by Hans de Goede · Sat Aug 08 14:05:35 2015 +0200
  25. 957a72729 sunxi: clock: Add clock_get_pll3() helper function by Hans de Goede · Sat Aug 08 12:36:44 2015 +0200
  26. ead68b6 sunxi: display: Add a few extra register and constant defines by Hans de Goede · Mon Aug 03 19:45:37 2015 +0200
  27. 2b735ad sunxi: Match sun4i, sun6i, sun9i CCI definitions for NAND and DMA by Roy Spliet · Tue May 26 17:00:41 2015 +0200
  28. 5f67b86 sunxi: video: Fix lvds panel support for sun6i+ by Hans de Goede · Thu May 14 18:52:54 2015 +0200
  29. 804fa57 sunxi: ohci: Add ohci usb host controller support by Hans de Goede · Sun May 10 14:10:27 2015 +0200
  30. 0fdbe20 sunxi: Add support for A33 PLL11 (second DRAM pll) by Hans de Goede · Sun Apr 12 11:46:41 2015 +0200
  31. bf880fe sunxi: Add a GMAC Transmit Clock Delay Chain Kconfig option by Hans de Goede · Sun Jan 25 12:10:48 2015 +0100
  32. d5c48ae sunxi: Move clock_get_pllX / clock_set_pllX protos to mach specific headers by Hans de Goede · Wed Jan 14 19:17:15 2015 +0100
  33. e7b852a sunxi: usbc: Add support for usb0 to the common usbc code by Hans de Goede · Wed Jan 07 15:26:06 2015 +0100
  34. a144198 sunxi: Move usb-controller init code out of ehci-sunxi.c for reuse for otg by Hans de Goede · Wed Jan 07 15:08:43 2015 +0100
  35. c5a3b4b sunxi: video: Modify sunxi_lcdc_pll_set to work with both tcon0 and tcon1 by Hans de Goede · Sun Dec 21 16:27:45 2014 +0100
  36. 645d4d5 sunxi: Fix PLL1 running at half speed on sun8i by Hans de Goede · Sat Dec 27 17:56:59 2014 +0100
  37. 966d239 sun8i: Add dram initialization support by Hans de Goede · Sun Dec 07 14:34:27 2014 +0100
  38. 0cbc4cb sun6i: Add a sigma_delta_enable paramter to clock_set_pll5() by Hans de Goede · Sun Nov 30 11:58:17 2014 +0100
  39. 06bfab0 sunxi: mmc: Properly setup mod-clk and clock sampling phases by Hans de Goede · Sun Dec 07 20:55:10 2014 +0100
  40. 07be6d6 sun6i: Add sunxi_get_ss_bonding_id() function by Hans de Goede · Sat Nov 15 22:55:53 2014 +0100
  41. 1a9a6fb sun6i: Add gmac support for sun6i boards by Hans de Goede · Fri Nov 21 17:19:45 2014 +0100
  42. 70d7ab5 sunxi: Add video pll clock functions by Hans de Goede · Sat Nov 08 14:07:27 2014 +0100
  43. b5ab8ce sun6i: ehci: Add sun6i ehci support by Hans de Goede · Fri Nov 07 14:51:12 2014 +0100
  44. c27d68d sun6i: Add clock functions needed for SPL / DRAM init by Hans de Goede · Sat Oct 25 20:16:33 2014 +0200
  45. 3a04542 ARM: sun6i: Add clock support by Chen-Yu Tsai · Fri Oct 03 20:16:25 2014 +0800