Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / d5c20ab96abf1b3b9a6a2c0502a3e2161e931ef2 / board / congatec / cgtqmx6eval / imximage.cfg
  1. 18473f4 imx: ddr: Move mx6q_4x_mt41j128.cfg to mx6sabresd board by Nitin Garg · Mon Sep 15 08:56:46 2014 -0500[Copied from board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg]
  2. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  3. 757a92f Merge branch 'u-boot/master' into 'u-boot-arm/master' by Albert ARIBAUD · Thu May 30 14:45:06 2013 +0200
  4. fd4b3d3 Fix references to the documentation files by Anatolij Gustschin · Tue Apr 30 11:15:33 2013 +0000
  5. 526a413 imx: mx6q_4x_mt41j128.cfg: Setup CCM_CCOSR register by Fabio Estevam · Wed Apr 17 08:33:26 2013 +0000
  6. 7bccdae imx: mx6q DDR3 init: Benefit from available CL = 7 by Benoît Thébaudeau · Wed Jan 30 11:19:18 2013 +0000
  7. d152f63 imx: mx6q DDR3 init: Fix MR0.PPD by Benoît Thébaudeau · Wed Jan 30 11:19:17 2013 +0000
  8. 4f81bd3 imx: mx6q DDR3 init: Fix RST_to_CKE by Benoît Thébaudeau · Wed Jan 30 11:19:16 2013 +0000
  9. 6e4651d imx: mx6q DDR3 init: Fix SDE_to_RST by Benoît Thébaudeau · Wed Jan 30 11:19:15 2013 +0000
  10. f8984cd imx: mx6q DDR3 init: Fix tXPR by Benoît Thébaudeau · Wed Jan 30 11:19:14 2013 +0000
  11. 2ce6167 imx: mx6q DDR3 init: Fix tMRD by Benoît Thébaudeau · Wed Jan 30 11:19:13 2013 +0000
  12. a18d786 imximage.cfg: run files through C preprocessor by Troy Kisky · Fri Jan 18 16:14:24 2013 +0000
  13. 4409384 mx6q: Factor out common DDR3 init code by Fabio Estevam · Thu Sep 13 03:18:19 2012 +0000[Renamed from board/freescale/mx6qsabrelite/imximage.cfg]
  14. 5e4ecda mx6: Avoid writing to read-only bits in imximage.cfg by Vikram Narayanan · Tue Jun 12 04:50:33 2012 +0000
  15. 570c607 mx6q: mx6qsabrelite: Add ECSPI support to the Sabrelite platform by Eric Nelson · Tue Jan 31 07:52:05 2012 +0000
  16. 0238468 i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite board by Jason Liu · Thu Dec 29 06:34:19 2011 +0000