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git01.mediatek.com / filogic / uboot / d55b77d9fce0dda29348da23c721cd5497a85283 / nand_spl / board / freescale / p1023rds
  1. c24895e Refactor linker-generated arrays by Albert ARIBAUD · Mon Feb 25 00:59:00 2013 +0000
  2. 992562c 8xxx: Change all 8*xx_DDR addresses to 8xxx by Andy Fleming · Tue Oct 23 19:03:46 2012 -0500
  3. 5847d78 spl/mpc85xx: rename cpu_init_nand.c to spl_minimal.c by Scott Wood · Thu Sep 20 16:35:21 2012 -0500
  4. fac8624 spl/mpc85xx: move udelay to cpu code by Scott Wood · Fri Aug 17 19:46:29 2012 -0500
  5. 3d48872 powerpc/mpc8xxx: move LAW code into arch/powerpc/cpu/mpc8xxx by Scott Wood · Fri Aug 17 16:17:50 2012 -0500
  6. 67de957 nand_spl: fix u-boot.lst breakage by Scott Wood · Tue Nov 13 12:30:39 2012 +0000
  7. a0603a3 common: Add symbol handling for generic lists into Makefile by Marek Vasut · Fri Oct 19 05:00:10 2012 +0000
  8. 4909647 nand_spl: change out_be32 to raw_writel and depend on subsequent sync by Matthew McClintock · Mon Aug 13 08:10:42 2012 +0000
  9. 90a2c6c nand_spl: p1023rds: wait before enabling DDR controller by Matthew McClintock · Mon Aug 13 10:00:40 2012 +0000
  10. 3e9ecf8 powerpc/85xx: Add basic support for P1023RDS board by Roy Zang · Thu Jun 09 11:30:52 2011 +0800