Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / d2d6fb76a8d0d703231a201c45df6e043f26cd9a / arch / arm / dts / zynq-cse-nor.dts
  1. 34140ec ARM: zynq: Add missing twd timer for mini configurations by Michal Simek · Tue Nov 29 13:23:20 2022 +0100
  2. ecd0ce5 ARM: zynq: Enable DM for CFI NOR flash by Michal Simek · Tue Feb 25 15:29:40 2020 +0100
  3. 24d4e75 ARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configuration by Michal Simek · Wed Feb 26 11:11:38 2020 +0100
  4. c1bb21b arm: zynq: Fix indentation for zynq-cse targets by Michal Simek · Fri Jul 20 10:17:17 2018 +0200
  5. bd35b56 arm: zynq: Remove fclk-enable property for cse-nor target by Michal Simek · Fri Jul 20 10:16:21 2018 +0200
  6. f3e0ed4 arm: zynq: Add parallel NOR flash mini u-boot configuration for zynq by Siva Durga Prasad Paladugu · Mon Jul 16 15:57:02 2018 +0530