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git01.mediatek.com / filogic / uboot / d239d360a11170f0f5d8d7ef7d09a15ff2691d62 / arch / riscv / lib
  1. bedc439 fdtdec: Support reserved-memory flags by Thierry Reding · Fri Sep 03 15:16:21 2021 +0200
  2. 5e33691 fdtdec: Support compatible string list for reserved memory by Thierry Reding · Fri Sep 03 15:16:19 2021 +0200
  3. 85c057e image: Drop IMAGE_ENABLE_OF_LIBFDT by Simon Glass · Sat Sep 25 19:43:21 2021 -0600
  4. cc382ff sysreset: provide SBI based sysreset driver by Heinrich Schuchardt · Sun Sep 12 21:11:46 2021 +0200
  5. c7ad952 riscv: Fix setting no-map in reserved memory nodes by Samuel Holland · Sun Sep 12 11:05:47 2021 -0500
  6. 637fa28 lmb: riscv: Add arch_lmb_reserve() by Marek Vasut · Fri Sep 10 22:47:15 2021 +0200
  7. c39544c riscv: lib: implement enable_caches for sifive cache by Zong Li · Wed Sep 01 15:01:41 2021 +0800
  8. a33070c common: board_r: support enable_caches for RISC-V by Zong Li · Wed Sep 01 15:01:40 2021 +0800
  9. 79c6855 riscv: show code leading to exception by Heinrich Schuchardt · Sat Sep 04 10:36:49 2021 +0200
  10. 5629aaa efi_loader: add Linux magic to RISC-V crt0 by Heinrich Schuchardt · Fri May 28 22:24:37 2021 +0200
  11. 51744fe riscv: booti: do not force relocation if force_reloc is not set by Vitaly Wool · Tue Apr 06 10:50:16 2021 +0300
  12. b6ec26b riscv: andes_plic: Fix riscv_get_ipi() mask by Bin Meng · Tue Jun 15 13:45:57 2021 +0800
  13. 442d446 riscv: Drop USE_SPL_FIT_GENERATOR by Bin Meng · Mon May 10 20:23:41 2021 +0800
  14. 8a27fcd riscv: Fix memmove and optimise memcpy when misalign by Bin Meng · Thu May 13 16:46:17 2021 +0800
  15. ac95f46 riscv: Fix arch_fixup_fdt always failing without /chosen by Sean Anderson · Fri May 14 22:36:16 2021 -0400
  16. 614b1d8 riscv: Split SiFive CLINT support between SPL and U-Boot proper by Bin Meng · Tue May 11 20:04:12 2021 +0800
  17. 369d87a Add support for stack-protector by Joel Peshkin · Sun Apr 11 11:21:58 2021 +0200
  18. 23caf66 riscv: assembler versions of memcpy, memmove, memset by Heinrich Schuchardt · Sat Mar 27 12:37:04 2021 +0100
  19. 76eb648 riscv: simplify longjmp by Heinrich Schuchardt · Tue Mar 23 19:11:26 2021 +0100
  20. 3ba929a common: Drop asm/global_data.h from common header by Simon Glass · Fri Oct 30 21:38:53 2020 -0600
  21. bb721de Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next by Tom Rini · Tue Jan 05 22:34:43 2021 -0500
  22. 65130cd dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET() by Simon Glass · Mon Dec 28 20:34:56 2020 -0700
  23. dd5d79b riscv: Complete efi header for RV32/64 by Leo Yu-Chi Liang · Mon Nov 16 17:07:41 2020 +0800
  24. b68402d riscv: Fix efi header size for RV32 by Leo Yu-Chi Liang · Thu Nov 12 10:09:52 2020 +0800
  25. fa36696 riscv: Fix efi header for RV32 by Atish Patra · Tue Oct 13 12:23:31 2020 -0700
  26. b881ba8 riscv: reset after crash by Heinrich Schuchardt · Wed Dec 02 14:36:26 2020 +0100
  27. 52a1db7 riscv: Move timer portions of SiFive CLINT to drivers/timer by Sean Anderson · Sun Oct 25 21:46:58 2020 -0400
  28. 5abf1f3 riscv: Move Andes PLMT driver to drivers/timer by Sean Anderson · Sun Oct 25 21:46:56 2020 -0400
  29. 947fc2d timer: Return count from timer_ops.get_count by Sean Anderson · Wed Oct 07 14:37:44 2020 -0400
  30. 38ae92e Merge branch 'next' by Tom Rini · Mon Oct 05 13:05:46 2020 -0400
  31. 2c4c7d1 riscv: Ensure gp is NULL or points to valid data by Sean Anderson · Mon Sep 21 07:51:40 2020 -0400
  32. ff184fe riscv: Use a valid bit to ignore already-pending IPIs by Sean Anderson · Mon Sep 21 07:51:37 2020 -0400
  33. cfb0809 riscv: Match memory barriers between send_ipi_many and handle_ipi by Sean Anderson · Mon Sep 21 07:51:36 2020 -0400
  34. 272ab20 riscv: Rework Sifive CLINT as UCLASS_TIMER driver by Sean Anderson · Mon Sep 28 10:52:26 2020 -0400
  35. 28bfc32 riscv: Clean up initialization in Andes PLIC by Sean Anderson · Mon Sep 28 10:52:25 2020 -0400
  36. 87e6ce5 riscv: Rework Andes PLMT as a UCLASS_TIMER driver by Sean Anderson · Mon Sep 28 10:52:24 2020 -0400
  37. 9baaaef riscv: Rework riscv timer driver to only support S-mode by Sean Anderson · Mon Sep 28 10:52:21 2020 -0400
  38. fbef54d riscv: restore global data pointer in trap handler by Heinrich Schuchardt · Sat Sep 26 07:50:36 2020 +0200
  39. 646f8c6 fdtdec: optionally add property no-map to created reserved memory node by Etienne Carriere · Thu Sep 10 10:49:59 2020 +0200
  40. 95492ae cmd: provide command sbi by Heinrich Schuchardt · Thu Aug 20 19:43:39 2020 +0200
  41. c78eef7 riscv: fix building with CONFIG_SPL_SMP=n by Heinrich Schuchardt · Sat Aug 15 09:49:26 2020 +0200
  42. 77efe24 riscv: additional crash information by Heinrich Schuchardt · Sat Aug 01 15:15:39 2020 +0000
  43. d2014d1 riscv: remove redundant logical constraint. by Heinrich Schuchardt · Mon Aug 03 23:33:42 2020 +0200
  44. 63dcfcb riscv: Call spl_board_init_f() in the generic SPL board_init_f() by Bin Meng · Sun Aug 02 23:09:01 2020 -0700
  45. 3af8678 Revert "riscv: Allow use of reset drivers" by Bin Meng · Sun Jul 19 20:06:45 2020 -0700
  46. 257875d riscv: Make SiFive HiFive Unleashed board boot again by Bin Meng · Sun Jul 19 23:17:07 2020 -0700
  47. 90fa4e9 Merge branch 'next' by Tom Rini · Mon Jul 06 15:46:38 2020 -0400
  48. 8cfbea0 riscv: use log functions in fdt_fixup by Heinrich Schuchardt · Tue Jun 30 11:30:59 2020 +0200
  49. 491734f riscv: Use optimized version of fdtdec_get_addr_size_no_parent by Atish Patra · Wed Jun 24 14:56:15 2020 -0700
  50. f0947db riscv: Do not return error if reserved node already exists by Atish Patra · Wed Jun 24 14:56:14 2020 -0700
  51. c71f100 riscv: Do not build reset.c if SYSRESET is on by Bin Meng · Mon Jun 22 22:29:44 2020 -0700
  52. 7a36bd8 riscv: Expand the DT size before copy reserved memory node by Bin Meng · Thu Jun 25 18:16:07 2020 -0700
  53. 77073f4 riscv: Avoid the reserved memory fixup if src and dst point to the same place by Bin Meng · Thu Jun 25 18:16:06 2020 -0700
  54. 35e14fb riscv: Allow use of reset drivers by Sean Anderson · Wed Jun 24 06:41:20 2020 -0400
  55. b1d0cb3 riscv: Clean up IPI initialization code by Sean Anderson · Wed Jun 24 06:41:18 2020 -0400
  56. e622c74 riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01 by Bin Meng · Wed May 27 02:04:53 2020 -0700
  57. b391ead riscv: sbi: Remove sbi_spec_version by Bin Meng · Wed May 27 02:04:52 2020 -0700
  58. a7edd07 riscv: Move all SMP related SBI calls to SBI_v01 by Atish Patra · Tue Apr 21 14:51:57 2020 -0700
  59. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  60. ed38aef command: Remove the cmd_tbl_t typedef by Simon Glass · Sun May 10 11:40:03 2020 -0600
  61. 9758973 common: Drop init.h from common header by Simon Glass · Sun May 10 11:40:02 2020 -0600
  62. 2dc9c34 common: Drop image.h from common header by Simon Glass · Sun May 10 11:40:01 2020 -0600
  63. 1ea9789 common: Drop bootstage.h from common header by Simon Glass · Sun May 10 11:40:00 2020 -0600
  64. 82ed8ef riscv: Move all fdt fixups together by Atish Patra · Tue Apr 21 11:15:04 2020 -0700
  65. 5fbac33 riscv: Copy the reserved-memory nodes to final DT by Atish Patra · Tue Apr 21 11:15:03 2020 -0700
  66. 7379192 riscv: Setup reserved-memory node for FU540 by Atish Patra · Tue Apr 21 11:15:02 2020 -0700
  67. 111b804 riscv: Provide a mechanism to fix DT for reserved memory by Atish Patra · Tue Apr 21 11:15:01 2020 -0700
  68. af3c043 riscv: Add boot hartid to device tree by Atish Patra · Tue Apr 21 11:14:59 2020 -0700
  69. b161f90 riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL by Bin Meng · Thu Apr 16 08:09:30 2020 -0700
  70. f7e6d33 riscv: Implement new SBI v0.2 extensions by Bin Meng · Mon Mar 09 19:35:31 2020 -0700
  71. 887d809 riscv: Introduce a new config for SBI v0.1 by Bin Meng · Mon Mar 09 19:35:30 2020 -0700
  72. ee3bcd0 riscv: Add basic support for SBI v0.2 by Bin Meng · Mon Mar 09 19:35:28 2020 -0700
  73. fb5eabc riscv: Avoid calling sbi_clear_ipi() by Bin Meng · Fri Mar 06 00:44:17 2020 -0800
  74. b7b1838 Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm by Tom Rini · Tue Feb 11 10:58:41 2020 -0500
  75. e8b46a1 riscv: Add option to print registers on exception by Sean Anderson · Wed Dec 25 00:27:44 2019 -0500
  76. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  77. f11478f common: Move hang() to the same header as panic() by Simon Glass · Sat Dec 28 10:45:07 2019 -0700
  78. 3bbe70c common: Move device-tree setup functions to fdt_support.h by Simon Glass · Sat Dec 28 10:44:54 2019 -0700
  79. c308e01 riscv: add option to wait for ack from secondary harts in smp functions by Lukas Auer · Sun Dec 08 23:28:51 2019 +0100
  80. c7460b8 riscv: add functions for reading the IPI status by Lukas Auer · Sun Dec 08 23:28:50 2019 +0100
  81. eb61303 riscv: andes_plic: Fix some wrong configurations by Rick Chen · Thu Nov 14 13:52:24 2019 +0800
  82. 9b61c7c common: Move interrupt functions into a new header by Simon Glass · Thu Nov 14 12:57:41 2019 -0700
  83. 6333448 common: Move ARM cache operations out of common.h by Simon Glass · Thu Nov 14 12:57:39 2019 -0700
  84. 1d91ba7 common: Move some cache and MMU functions out of common.h by Simon Glass · Thu Nov 14 12:57:37 2019 -0700
  85. b8745f0 RISC-V: Align boot image header with Linux by Atish Patra · Wed Oct 09 10:34:17 2019 -0700
  86. eaae83b riscv: andes_plic: init plic by scanning each cpu node by Rick Chen · Wed Aug 21 11:26:50 2019 +0800
  87. e9fbc71 riscv: add a generic FIT generator script by Lukas Auer · Wed Aug 21 21:14:47 2019 +0200
  88. 396f0bd riscv: add SPL support by Lukas Auer · Wed Aug 21 21:14:45 2019 +0200
  89. 6134659 riscv: add run mode configuration for SPL by Lukas Auer · Wed Aug 21 21:14:43 2019 +0200
  90. d680e9a efi_loader: use predefined constants in crt0_*_efi.S by Heinrich Schuchardt · Thu Jul 11 06:39:32 2019 +0200
  91. 583b409 RISCV: image: Add booti support by Atish Patra · Mon May 06 17:49:39 2019 -0700
  92. e5e6c36 riscv: Introduce CONFIG_XIP to support booting from flash by Rick Chen · Tue Apr 30 13:49:33 2019 +0800
  93. 7376677 riscv: Add a SYSCON driver for Andestech's PLMT by Rick Chen · Tue Apr 02 15:56:40 2019 +0800
  94. 6df4ed0 riscv: Add a SYSCON driver for Andestech's PLIC by Rick Chen · Tue Apr 02 15:56:39 2019 +0800
  95. c4a6c8f riscv: boot images passed to bootm on all harts by Lukas Auer · Sun Mar 17 19:28:38 2019 +0100
  96. a359665 riscv: add support for multi-hart systems by Lukas Auer · Sun Mar 17 19:28:37 2019 +0100
  97. e79178b riscv: implement IPI platform functions using SBI by Lukas Auer · Sun Mar 17 19:28:34 2019 +0100
  98. 83d573d riscv: add infrastructure for calling functions on other harts by Lukas Auer · Sun Mar 17 19:28:32 2019 +0100
  99. 09dfc3c riscv: use invalidate/flush_*cache_range functions in cache.c by Lukas Auer · Fri Jan 04 01:37:30 2019 +0100
  100. 6280e32 riscv: move the AX25-specific implementation of flush_dcache_all by Lukas Auer · Fri Jan 04 01:37:29 2019 +0100