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git01.mediatek.com / filogic / uboot / d207b7e2d5724fb190b40c627dc8142b56e994ed / arch / arm / include / asm / armv8
  1. 0078786 ARMv8/layerscape: Add FSL PPA support by Hou Zhiqiang · Tue Jun 28 20:18:14 2016 +0800
  2. 505d735 ARMv8: add the secure monitor firmware framework by Hou Zhiqiang · Tue Jun 28 20:18:13 2016 +0800
  3. c7104e5 armv8: mmu: Add support of non-identical mapping by York Sun · Fri Jun 24 16:46:22 2016 -0700
  4. a81fcd1 armv8: mmu: house cleaning by York Sun · Fri Jun 24 16:46:20 2016 -0700
  5. ce0a64e arm64: Remove non-full-va map code by Alexander Graf · Fri Mar 04 01:09:54 2016 +0100
  6. 6b3e7ca thunderx: Move mmu table into board file by Alexander Graf · Fri Mar 04 01:09:48 2016 +0100
  7. e317fe8 arm64: Make full va map code more dynamic by Alexander Graf · Fri Mar 04 01:09:47 2016 +0100
  8. f03c0e4 arm64: Disable TTBR1 maps in EL1 by Alexander Graf · Fri Mar 04 01:09:46 2016 +0100
  9. fb74cc1 thunderx: Calculate TCR dynamically by Alexander Graf · Fri Mar 04 01:09:45 2016 +0100
  10. 78eaa49 armv8: New MMU setup code allowing to use 48+ bits PA/VA by Sergey Temerkhanov · Wed Oct 14 09:55:45 2015 -0700
  11. e28e18c armv8/layerscape: Update MMU table with execute-never bits by Alison Wang · Thu Nov 05 11:15:49 2015 +0800
  12. e4e93ea armv8/fsl_lsch2: Add fsl_lsch2 SoC by Mingkai Hu · Mon Oct 26 19:47:51 2015 +0800
  13. a3e45ab armv8/mmu: Set bits marked RES1 in TCR by Thierry Reding · Thu Aug 20 11:52:14 2015 +0200
  14. c2d7076 armv8/mmu: Clean up TCR programming by Thierry Reding · Thu Aug 20 11:52:13 2015 +0200
  15. 7f8e178 armv8: fsl-lsch3: Rewrite MMU translation table entries by Alison Wang · Tue Aug 18 11:22:05 2015 +0800
  16. 5d849ac armv8: Fix TCR macros for shareability attribute by Zhichun Hua · Mon Jun 29 15:49:37 2015 +0800
  17. 2e3ad39 armv8/fsl-lsch3: Change normal memory shareability by York Sun · Tue Jan 06 13:11:22 2015 -0800
  18. ef63194 ARMv8: Adjust MMU setup by York Sun · Mon Jun 23 15:15:53 2014 -0700
  19. 85fd5f1 arm64: core support by David Feng · Sat Dec 14 11:47:35 2013 +0800