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git01.mediatek.com / filogic / uboot / ce64bd3ff0c8add9db0acef2370b6a03122f5b50 / drivers / ram / stm32mp1 / stm32mp1_tuning.c
  1. 753f536 ram: stm32mp1: migrate trace to dev or log macro by Patrick Delaunay · Fri Nov 06 19:01:36 2020 +0100
  2. dbd7954 common: Drop linux/delay.h from common header by Simon Glass · Sun May 10 11:40:11 2020 -0600
  3. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  4. 274e0b0 common: Drop net.h from common header by Simon Glass · Sun May 10 11:39:56 2020 -0600
  5. 6cdc120 ram: stm32mp1: reduce delay after BIST reset for tuning by Patrick Delaunay · Fri Mar 06 11:14:10 2020 +0100
  6. 131ec95 ram: stm32mp1: update BIST config for tuning by Patrick Delaunay · Fri Mar 06 11:14:08 2020 +0100
  7. 656d2a9 ram: stm32mp1: tuning: deactivate derating during BIST test by Patrick Delaunay · Fri Mar 06 11:14:07 2020 +0100
  8. 0cd380b ram: stm32mp1: tuning: add timeout for polling BISTGSR.BDDONE by Patrick Delaunay · Fri Mar 06 11:14:06 2020 +0100
  9. 030df3b ram: stm32mp1: display result for software read DQS gating by Patrick Delaunay · Fri Mar 06 11:14:04 2020 +0100
  10. 2f91e61 stm32mp1: ram: add tuning in DDR interactive mode by Patrick Delaunay · Wed Apr 10 14:09:29 2019 +0200