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git01.mediatek.com / filogic / uboot / cde8c95e062c97c52a093ffaf6fc1c37c530ac3c / arch / arm / dts / mt7988.dtsi
  1. e4bfc44 clk: mediatek: mt7988: rename CK to CLK by Christian Marangi · Sat Aug 03 10:33:02 2024 +0200
  2. 826afb7 clk: mediatek: mt7988: convert to unified infracfg gates + muxes by Christian Marangi · Sat Aug 03 10:33:01 2024 +0200
  3. 532f979 clk: mediatek: mt7988: rename TOPCKGEN factor clock to upstream naming by Christian Marangi · Sat Aug 03 10:32:56 2024 +0200
  4. d1f073e clk: mediatek: mt7988: drop 1/1 infracfg spurious factor by Christian Marangi · Sat Aug 03 10:32:55 2024 +0200
  5. 2861be6 clk: mediatek: mt7988: rename CB_CKSQ_40M to TOP_XTAL by Christian Marangi · Sat Aug 03 10:32:50 2024 +0200
  6. 4c813af arm: dts: mt7988-sd-rfb: add SD pin driving settings by developer · Mon Jan 22 10:07:54 2024 +0800
  7. 7950d17 arm: mediatek: add usb support for MT7988 by Frank Wunderlich · Thu Aug 03 20:00:01 2023 +0200
  8. f596c1a arm: mediatek: add support for MediaTek MT7988 SoC by developer · Wed Jul 19 17:17:49 2023 +0800