Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
cd817d510f82ebbe16498611b732060b337f3ca6
/
drivers
/
ddr
/
altera
/
sequencer.c
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
a4af914
ddr: altera: silence PHY calibration unless in debug mode
by Goldschmidt Simon
· Thu Jan 25 06:04:44 2018 +0000
66acabc
ddr: altera: Repair DQ window centering code
by Marek Vasut
· Tue Apr 05 23:17:35 2016 +0200
a4b9fa1
ddr: altera: Staticize global variables
by Marek Vasut
· Tue Apr 05 11:18:38 2016 +0200
4df2d7b
ddr: altera: Make DLEVEL behavior inclusive
by Marek Vasut
· Mon Apr 04 21:21:05 2016 +0200
f4d3862
ddr: altera: Zero DM IN delay in scc_mgr_zero_group()
by Marek Vasut
· Mon Apr 04 21:16:18 2016 +0200
2bf2ee5
ddr: altera: Remove unnecessary ODT mode config
by Marek Vasut
· Mon Apr 04 19:10:12 2016 +0200
acee8fd
ddr: altera: Remove unnecessary update of the SCC
by Marek Vasut
· Mon Apr 04 18:41:53 2016 +0200
45ce296
ddr: altera: Fix scc_mgr_set() argument order
by Marek Vasut
· Mon Apr 04 17:28:16 2016 +0200
6946989
ddr: altera: Tweak DQS tracking enable handling
by Marek Vasut
· Tue Apr 05 23:41:56 2016 +0200
2654bc9
ddr: altera: Replace ad-hoc constant with macro
by Marek Vasut
· Mon Apr 04 16:07:11 2016 +0200
eb447cb
ddr: altera: Repair uninited variable
by Marek Vasut
· Mon Aug 10 23:01:43 2015 +0200
af67cf3
ddr: altera: Replace float multiplication with integer one
by Marek Vasut
· Mon Aug 10 22:50:11 2015 +0200
c85b9b3
ddr: altera: sequencer: Clean checkpatch issues
by Marek Vasut
· Sun Aug 02 19:47:01 2015 +0200
8af9ca0
ddr: altera: sequencer: Clean data types
by Marek Vasut
· Sun Aug 02 19:42:26 2015 +0200
5867376
ddr: altera: sequencer: Pluck out misc macros from code
by Marek Vasut
· Sun Aug 02 19:26:55 2015 +0200
324d3f7
ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VAL
by Marek Vasut
· Sun Aug 02 19:24:12 2015 +0200
32d813e
ddr: altera: sequencer: Zap VFIFO_SIZE
by Marek Vasut
· Sun Aug 02 19:21:56 2015 +0200
f00a6ea
ddr: altera: sequencer: Wrap misc remaining macros
by Marek Vasut
· Sun Aug 02 19:18:47 2015 +0200
7e8f8a7
ddr: altera: sequencer: Pluck out IO_* macros from code
by Marek Vasut
· Sun Aug 02 19:10:58 2015 +0200
3bf9204
ddr: altera: sequencer: Wrap IO_* macros
by Marek Vasut
· Sun Aug 02 19:00:23 2015 +0200
2dfc76b
ddr: altera: sequencer: Pluck out RW_MGR_* macros from code
by Marek Vasut
· Sun Aug 02 18:44:06 2015 +0200
39b620e
ddr: altera: sequencer: Wrap RW_MGR_* macros
by Marek Vasut
· Sun Aug 02 18:12:08 2015 +0200
3384e74
ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_init
by Marek Vasut
· Sun Aug 02 17:15:19 2015 +0200
eb98b38
ddr: altera: sequencer: Zap unused params and macros
by Marek Vasut
· Sun Aug 02 18:27:21 2015 +0200
662a8a6
ddr: altera: sequencer: Move qts-generated files to board dir
by Marek Vasut
· Sun Aug 02 16:55:45 2015 +0200
98d279a
ddr: altera: Clean up of delay_for_n_mem_clocks() part 5
by Marek Vasut
· Sun Jul 26 11:46:04 2015 +0200
7574c87
ddr: altera: Clean up of delay_for_n_mem_clocks() part 4
by Marek Vasut
· Sun Jul 26 11:44:54 2015 +0200
13ee438
ddr: altera: Clean up of delay_for_n_mem_clocks() part 3
by Marek Vasut
· Sun Jul 26 11:42:53 2015 +0200
4b203df
ddr: altera: Clean up of delay_for_n_mem_clocks() part 2
by Marek Vasut
· Sun Jul 26 11:34:09 2015 +0200
50d7199
ddr: altera: Clean up of delay_for_n_mem_clocks() part 1
by Marek Vasut
· Sun Jul 26 11:11:28 2015 +0200
c140275
ddr: altera: Minor clean up of rw_mgr_mem_handoff()
by Marek Vasut
· Sun Jul 26 10:59:19 2015 +0200
a358127
ddr: altera: Clean up rw_mgr_mem_calibrate_lfifo()
by Marek Vasut
· Tue Jul 21 06:18:57 2015 +0200
2da0257
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_end()
by Marek Vasut
· Sat Jul 18 05:58:44 2015 +0200
adbaa2d
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test_issue()
by Marek Vasut
· Tue Jul 21 06:00:36 2015 +0200
c67d962
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 3
by Marek Vasut
· Tue Jul 21 05:57:11 2015 +0200
bc773a1
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 2
by Marek Vasut
· Tue Jul 21 05:54:39 2015 +0200
0b97c42
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 1
by Marek Vasut
· Tue Jul 21 05:43:37 2015 +0200
2595b24
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 5
by Marek Vasut
· Tue Jul 21 05:33:49 2015 +0200
fc2ec8f
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 4
by Marek Vasut
· Tue Jul 21 05:32:49 2015 +0200
1bb221e
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 3
by Marek Vasut
· Tue Jul 21 05:29:05 2015 +0200
4e79b0a
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 2
by Marek Vasut
· Tue Jul 21 05:26:58 2015 +0200
affbc89
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 1
by Marek Vasut
· Tue Jul 21 05:00:42 2015 +0200
9cdbb96
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 11
by Marek Vasut
· Tue Jul 21 04:27:32 2015 +0200
d29f804
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 10
by Marek Vasut
· Sat Jul 18 20:44:28 2015 +0200
dfed1e6
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 9
by Marek Vasut
· Sat Jul 18 20:42:27 2015 +0200
b69c247
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 8
by Marek Vasut
· Sat Jul 18 20:34:00 2015 +0200
f1b8f71
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 7
by Marek Vasut
· Sat Jul 18 19:57:12 2015 +0200
89feb50
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 6
by Marek Vasut
· Sat Jul 18 19:46:26 2015 +0200
aa0e6e1
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 5
by Marek Vasut
· Sat Jul 18 19:18:06 2015 +0200
ca8ea37
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 4
by Marek Vasut
· Sat Jul 18 08:01:45 2015 +0200
85cd4d7
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 3
by Marek Vasut
· Mon Jul 13 02:48:34 2015 +0200
e624caf
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 2
by Marek Vasut
· Mon Jul 13 02:38:15 2015 +0200
b20a506
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 1
by Marek Vasut
· Mon Jul 13 02:11:02 2015 +0200
4a78cc7
ddr: altera: Clean up rw_mgr_mem_calibrate_writes()
by Marek Vasut
· Sat Jul 18 07:23:25 2015 +0200
656002e
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 5
by Marek Vasut
· Mon Jul 20 03:26:05 2015 +0200
50a780f
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 4
by Marek Vasut
· Sun Jul 19 07:57:28 2015 +0200
28957f3
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 3
by Marek Vasut
· Sun Jul 19 07:51:17 2015 +0200
c6c1fe7
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 2
by Marek Vasut
· Sun Jul 19 07:48:58 2015 +0200
a005c77
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 1
by Marek Vasut
· Sun Jul 19 07:44:21 2015 +0200
a50d5d7
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test_all_ranks()
by Marek Vasut
· Sun Jul 19 07:35:36 2015 +0200
ec4bbd3
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 7
by Marek Vasut
· Mon Jul 20 09:11:09 2015 +0200
28dbf12
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 6
by Marek Vasut
· Mon Jul 20 09:20:42 2015 +0200
59729a6
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 5
by Marek Vasut
· Mon Jul 20 09:20:20 2015 +0200
6ff36b7
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 4
by Marek Vasut
· Sun Jul 19 07:27:06 2015 +0200
deebda8
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 3
by Marek Vasut
· Sun Jul 19 07:03:15 2015 +0200
970539d
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 2
by Marek Vasut
· Sun Jul 19 07:00:26 2015 +0200
4896bcc
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 1
by Marek Vasut
· Sun Jul 19 02:42:21 2015 +0200
088eb21
ddr: altera: Clean up find_vfifo_read()
by Marek Vasut
· Sun Jul 19 06:45:43 2015 +0200
42e43ab
ddr: altera: Clean up rw_mgr_*_vfifo() part 2
by Marek Vasut
· Sun Jul 19 06:37:51 2015 +0200
1c9f25b
ddr: altera: Clean up rw_mgr_*_vfifo() part 1
by Marek Vasut
· Sun Jul 19 06:25:27 2015 +0200
6394ef5
ddr: altera: Clean up sdr_*_phase() part 10
by Marek Vasut
· Sun Jul 19 06:04:00 2015 +0200
6eff803
ddr: altera: Clean up sdr_*_phase() part 9
by Marek Vasut
· Sun Jul 19 05:48:30 2015 +0200
f260eec
ddr: altera: Clean up sdr_*_phase() part 8
by Marek Vasut
· Sun Jul 19 05:42:43 2015 +0200
2700b9c
ddr: altera: Clean up sdr_*_phase() part 7
by Marek Vasut
· Sun Jul 19 05:40:06 2015 +0200
6da8ae4
ddr: altera: Clean up sdr_*_phase() part 6
by Marek Vasut
· Sun Jul 19 05:35:40 2015 +0200
f2b02d4
ddr: altera: Clean up sdr_*_phase() part 5
by Marek Vasut
· Sun Jul 19 05:26:49 2015 +0200
b148ebe
ddr: altera: Clean up sdr_*_phase() part 4
by Marek Vasut
· Sun Jul 19 05:01:12 2015 +0200
434f639
ddr: altera: Clean up sdr_*_phase() part 3
by Marek Vasut
· Sun Jul 19 04:37:08 2015 +0200
6ff1c85
ddr: altera: Clean up sdr_*_phase() part 2
by Marek Vasut
· Sun Jul 19 04:34:12 2015 +0200
139ad79
ddr: altera: Clean up sdr_*_phase() part 1
by Marek Vasut
· Sun Jul 19 04:29:21 2015 +0200
fea03c3
ddr: altera: Clean up sdr_find_window_centre() part 3
by Marek Vasut
· Sun Jul 19 04:14:32 2015 +0200
ea4c4bb
ddr: altera: Clean up sdr_find_window_centre() part 2
by Marek Vasut
· Sun Jul 19 04:04:33 2015 +0200
d996e80
ddr: altera: Clean up sdr_find_window_centre() part 1
by Marek Vasut
· Sun Jul 19 02:56:59 2015 +0200
3aa19dc
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 4
by Marek Vasut
· Sat Jul 18 04:28:42 2015 +0200
1beb243
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 3
by Marek Vasut
· Sat Jul 18 04:24:49 2015 +0200
faf820a
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 2
by Marek Vasut
· Sat Jul 18 04:20:26 2015 +0200
bb9a5f7
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 1
by Marek Vasut
· Sat Jul 18 04:16:45 2015 +0200
55c4d69
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test_patterns()
by Marek Vasut
· Sat Jul 18 03:55:07 2015 +0200
fcef833
ddr: altera: Zap rw_mgr_mem_calibrate_read_test_patterns_all_ranks()
by Marek Vasut
· Sat Jul 18 03:36:09 2015 +0200
6a75278
ddr: altera: Minor rw_mgr_mem_calibrate_read_load_patterns() cleanup
by Marek Vasut
· Sat Jul 18 03:34:22 2015 +0200
349ea3e
ddr: altera: Extract Centering DQ/DQS from rw_mgr_mem_calibrate_vfifo()
by Marek Vasut
· Sat Jul 18 03:10:31 2015 +0200
feb5e65
ddr: altera: Extract DQS enable calibration from rw_mgr_mem_calibrate_vfifo()
by Marek Vasut
· Sat Jul 18 02:57:32 2015 +0200
6ca5b96
ddr: altera: Extract guaranteed write from rw_mgr_mem_calibrate_vfifo()
by Marek Vasut
· Sat Jul 18 02:46:56 2015 +0200
912d43e
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 7
by Marek Vasut
· Sat Jul 18 03:15:34 2015 +0200
e42fcea
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 6
by Marek Vasut
· Fri Jul 17 04:24:18 2015 +0200
0d9f9d5
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 5
by Marek Vasut
· Fri Jul 17 03:54:34 2015 +0200
f2a4bda
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 4
by Marek Vasut
· Fri Jul 17 03:50:17 2015 +0200
d7f4915
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 3
by Marek Vasut
· Fri Jul 17 03:44:26 2015 +0200
aff1a5f
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 2
by Marek Vasut
· Fri Jul 17 03:22:31 2015 +0200
Next »