Log - cd506ef7cd1c1083fca7c8f9fa80df05b8af7db8 - filogic/uboot

dec7ea0 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" by Tom Rini · Mon May 20 13:35:03 2024 -0600
abb9a04 Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" by Tom Rini · Sat May 18 20:20:43 2024 -0600
5ab32a0 arm: imx: Remove <common.h> and add needed includes by Tom Rini · Tue Apr 30 07:35:49 2024 -0600
e9e068f imx: imx8ulp: Update clocks to meet max rate restrictions by Ye Li · Tue Jan 31 16:42:25 2023 +0800
bebd282 imx8ulp: clock: Fix lcd clock algo by Loic Poulain · Thu Mar 31 12:39:37 2022 +0200
0736da9 imx: imx8ulp: enable MU0_B clk by default by Peng Fan · Wed Apr 06 14:30:15 2022 +0800
8c0c8d0 imx: imx8ulp_evk: Skip init DDR for reboot in dual boot mode by Ye Li · Wed Apr 06 14:30:13 2022 +0800
4cdb3a3 imx: imx8ulp: add ND/LD clock by Peng Fan · Wed Apr 06 14:30:12 2022 +0800
276dfd5 imx: imx8ulp: clock: Add clock support for i3c controller by Clark Wang · Wed Apr 06 14:30:09 2022 +0800
8840830 imx8ulp: clock: Handle the DDRLOCKED when setting DDR clock by Ye Li · Fri Oct 29 09:46:30 2021 +0800
23ee0e1 imx8ulp: clock: Support to enable/disable the ADC1 clock by Alice Guo · Fri Oct 29 09:46:29 2021 +0800
cb7e375 imx8ulp: clock: Support to reset DCNano and MIPI DSI by Ye Li · Fri Oct 29 09:46:27 2021 +0800
328f201 imx8ulp: clock: Reset DDR controller before clock enable by Ye Li · Fri Oct 29 09:46:26 2021 +0800
27666ca imx8ulp_evk: Control LPI2C0 PCA6416 and TPM0 for display by Ye Li · Fri Oct 29 09:46:21 2021 +0800
3d3dfb0 imx8ulp: clock: Add MIPI DSI clock and DCNano clock by Ye Li · Fri Oct 29 09:46:19 2021 +0800
da0469d imx8ulp: clock: Support LPAV clocks in cgc and pcc by Ye Li · Fri Oct 29 09:46:18 2021 +0800
690eea1 arm: imx8ulp: add clock support by Peng Fan · Sat Aug 07 16:00:45 2021 +0800
b15705a arm: imx: basic i.MX8ULP support by Peng Fan · Sat Aug 07 16:00:35 2021 +0800