1. e67c6c4 zynq: Move zynq to clock framework by Stefan Herbrechtsmeier · Tue Jan 17 16:27:30 2017 +0100
  2. 7f4e555 net: gem: Allow to set the MAC from an EEPROM by Joe Hershberger · Tue Jan 26 11:57:03 2016 -0600
  3. 9ecd268 zynq: sdhci: Move driver to DM by Michal Simek · Mon Nov 30 16:13:03 2015 +0100
  4. f399a51 zynq: sdhci: Remove zynq_sdhci_of_init() by Michal Simek · Mon Nov 30 16:07:07 2015 +0100
  5. 5ab14c3 ARM: zynq: move SoC headers to mach-zynq/include/mach by Masahiro Yamada · Mon Mar 16 16:43:23 2015 +0900[Renamed from arch/arm/include/asm/arch-zynq/sys_proto.h]
  6. 384081a mmc: zynq: Use phys_addr_t for addresses by Michal Simek · Wed Jan 14 16:11:47 2015 +0100
  7. bf4b149 ARM: zynq: Move ps7_init() out of spl.h by Michal Simek · Mon Aug 11 14:01:57 2014 +0200
  8. 8d19162 ARM: zynq: Add MIO detection code by Michal Simek · Fri Apr 25 12:21:04 2014 +0200
  9. e26ef3b ARM: zynq: Added efuse status register base address by Siva Durga Prasad Paladugu · Fri Nov 29 19:01:25 2013 +0530
  10. c57ba04 mmc: zynq: Add OF initialization support by Michal Simek · Mon Feb 24 11:16:31 2014 +0100
  11. 4dded98 net: zynq_gem: Calculate clock dividers dynamically by Soren Brinkmann · Thu Nov 21 13:39:01 2013 -0800
  12. 3b5b992 net: zynq_gem: Move RCLK details out of driver by Soren Brinkmann · Thu Nov 21 13:39:00 2013 -0800
  13. 11704c2 zynq: Add support to find bootmode by Jagannadha Sutradharudu Teki · Thu Jan 09 01:48:21 2014 +0530
  14. f5ff7bc zynq: Add new ddrc driver for ECC support by Michal Simek · Mon Jun 17 14:37:01 2013 +0200
  15. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  16. 15d654c fpga: zynq: Add support for loading bitstream by Michal Simek · Mon Apr 22 15:43:02 2013 +0200
  17. 0dd222b mmc: Add support for Xilinx Zynq sdhci controller by Michal Simek · Mon Apr 22 14:56:49 2013 +0200
  18. d9f2c11 net: gem: Fix gem driver on 1Gbps LAN by Michal Simek · Mon Oct 15 14:01:23 2012 +0200
  19. eb1dfa7 arm: zynq: Add SLCR support with system reset by Michal Simek · Mon Feb 04 12:38:59 2013 +0100