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git01.mediatek.com / filogic / uboot / c723aa0a4be2fc2d899b81f50586a6d2e4366f3b / drivers / net / zynq_gem.c
  1. cbf20b2 net: zynq_gem: Add d-cache support by Srikanth Thokala · Fri Nov 08 22:55:48 2013 +0530
  2. bd8ec7e Coding Style cleanup: remove trailing white space by Wolfgang Denk · Mon Oct 07 13:07:26 2013 +0200
  3. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  4. ab72cb4 net: gem: Add support for phy autodetection by Michal Simek · Mon Apr 22 14:41:09 2013 +0200
  5. 73875dc net: gem: Preserve clk on emio interface by David Andrey · Fri Apr 05 17:24:24 2013 +0200
  6. 1b0dd5e net: gem: Pass phy address to init by David Andrey · Thu Apr 04 19:13:07 2013 +0200
  7. d9f2c11 net: gem: Fix gem driver on 1Gbps LAN by Michal Simek · Mon Oct 15 14:01:23 2012 +0200
  8. a94f84d net: gem: Do not initialize BDs again by Michal Simek · Thu Jan 24 13:04:12 2013 +0100
  9. 3b9f30e net: gem: Simplify return path in zynq_gem_recv by Michal Simek · Fri Jan 25 08:24:18 2013 +0100
  10. bb2ad88 net: gem: Remove WRAP bit from TX buffer description by Michal Simek · Wed Oct 17 11:03:40 2012 +0200
  11. 19dfc47 net: Add driver for Zynq Gem IP by Michal Simek · Thu Sep 13 20:23:34 2012 +0000