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git01.mediatek.com / filogic / uboot / c6eb9e76bd459c777b41bc9b699fd9ac9366cd3b / arch / arm / dts / socfpga_arria10_socdk.dtsi
  1. a217c12 arm: dts: socfpga: Add u-boot, dm-pre-reloc for sysmgr and clkmgr nodes by Ley Foon Tan · Fri Nov 08 10:38:18 2019 +0800
  2. c324746 ARM: dts: socfpga: Factor out U-Boot specifics from A10 handoff files by Marek Vasut · Wed Mar 06 19:47:22 2019 +0100
  3. 2a092a3 ARM: dts: socfpga: Drop ad-hoc UART clock frequency encoding from DT by Marek Vasut · Tue Aug 21 16:26:32 2018 +0200
  4. 6544d3e ARM: dts: socfpga: Flag timer clock as pre-reloc by Marek Vasut · Sat Aug 18 19:13:28 2018 +0200
  5. c2b2144 ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes by Marek Vasut · Mon Aug 06 22:07:40 2018 +0200
  6. d41a466 ARM: dts: socfpga: Add i2c alias to A10 SoCDK by Marek Vasut · Mon Aug 13 20:40:54 2018 +0200
  7. a77d9f8 ARM: socfpga: Make DRAM node available in SPL by Marek Vasut · Tue May 29 18:02:22 2018 +0200
  8. 03f80b1 ARM: socfpga: Synchronize Arria10 DTs by Marek Vasut · Mon Apr 23 01:37:57 2018 +0200