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git01.mediatek.com / filogic / uboot / c655ef13e57c83f204df9b4feabeb2f82d78d5a4 / board / freescale / p1010rdb / spl_minimal.c
  1. 7d53de0 powerpc/p1010rdb: fix calculating ddr_freq_mhz by Shengzhou Liu · Tue Aug 13 16:41:19 2013 +0800
  2. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  3. 66d6aa8 board/p1010rdb:Add NAND boot support using new SPL format by Prabhakar Kushwaha · Tue Apr 16 13:28:12 2013 +0530[Renamed (94%) from nand_spl/board/freescale/p1010rdb/nand_boot.c]
  4. 992562c 8xxx: Change all 8*xx_DDR addresses to 8xxx by Andy Fleming · Tue Oct 23 19:03:46 2012 -0500
  5. 4909647 nand_spl: change out_be32 to raw_writel and depend on subsequent sync by Matthew McClintock · Mon Aug 13 08:10:42 2012 +0000
  6. 4a71d58 nand_spl: update udelay for Freescale boards by Matthew McClintock · Mon Aug 13 13:21:19 2012 +0000
  7. 03183cc powerpc/p1010rdb: nandboot: compare SVR properly by Matthew McClintock · Mon Aug 13 08:10:39 2012 +0000
  8. 78fb175 p1014rdb: set ddr bus width properly depending on SVR by Matthew McClintock · Mon Aug 13 08:10:37 2012 +0000
  9. 2f143ed powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB by Dipen Dudhat · Thu Jul 28 14:47:28 2011 -0500