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git01.mediatek.com / filogic / uboot / c30ddccd77ae2656539af4a0d5346c0262b9fe2f / drivers / clk / exynos / clk-exynos7420.c
  1. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  2. a962243 clk: convert API to match reset/mailbox style by Stephen Warren · Fri Jun 17 09:44:00 2016 -0600
  3. e3fc84c clk: exynos: add clock driver for Exynos7420 Soc by Thomas Abraham · Sat Apr 23 22:18:09 2016 +0530