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git01.mediatek.com / filogic / uboot / c2cd3010ab947a8f4ff0c3c1dbc73b0cf697c1ae / drivers / clk / exynos / Makefile
  1. 4cafa21 global: Rename SPL_TPL_ to PHASE_ by Simon Glass · Sun Sep 29 19:49:54 2024 -0600
  2. df5a2b9 clk: exynos: Add Exynos850 clock driver by Sam Protsenko · Wed Jan 10 21:09:04 2024 -0600
  3. 8a0f634 clk: exynos: Add Samsung clock framework by Sam Protsenko · Wed Jan 10 21:09:03 2024 -0600
  4. 8bcc884 clk: exynos: Move pll code into clk-exynos7420 by Sam Protsenko · Wed Jan 10 21:09:02 2024 -0600
  5. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  6. e3fc84c clk: exynos: add clock driver for Exynos7420 Soc by Thomas Abraham · Sat Apr 23 22:18:09 2016 +0530