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git01.mediatek.com / filogic / uboot / c23fbdd9ca31f19935b7ec1f76a2b97888f09a05 / arch / arm / mach-sunxi / dram_sun50i_h6.c
  1. 370245e sunxi: H6: DRAM: Add support for half DQ by Jernej Skrabec · Fri Aug 23 19:24:04 2019 +0200
  2. fed1d2f sunxi: H6: Add DDR3 DRAM delay values by Jernej Skrabec · Mon Jul 15 02:27:09 2019 +0100
  3. c78a47a sunxi: H6: Add DDR3 support to DRAM controller driver by Andre Przywara · Mon Jul 15 02:27:07 2019 +0100
  4. 1c7a751 sunxi: H6: move LPDDR3 timing definition into separate file by Andre Przywara · Mon Jul 15 02:27:06 2019 +0100
  5. 595475e sunxi: H6: DRAM: follow recommended PHY init algorithm by Andre Przywara · Mon Jul 15 02:27:05 2019 +0100
  6. de5d61f sunxi: H6: DRAM: avoid memcpy() on MMIO registers by Andre Przywara · Mon Jul 15 02:27:04 2019 +0100
  7. ac2ed96 sunxi: fix DRAM gate/reset sequence of H6 by Icenowy Zheng · Sat Oct 06 23:23:32 2018 +0800
  8. 4e287f6 sunxi: add DRAM support to H6 by Icenowy Zheng · Mon Jul 23 06:13:34 2018 +0800